Repository
https://github.com/verilog-to-routing/vtr-verilog-to-routing
Project Slug
vtr-docs
Last Built
4 years, 7 months ago
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Maintainers
Badge
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reStructuredText
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:alt: Documentation Status
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Markdown
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HTML
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Tags
cad,
eda,
fpga,
placement,
routing,
synthesis,
verilog,
vpr,
vtr
Short URLs
vtr-docs.readthedocs.io
vtr-docs.rtfd.io
Default Version
latest
'latest' Version
master