Contiki-NG
jn516x-def.h
1 /*
2  * Copyright (c) 2015, SICS Swedish ICT.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  * notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  * notice, this list of conditions and the following disclaimer in the
12  * documentation and/or other materials provided with the distribution.
13  * 3. Neither the name of the Institute nor the names of its contributors
14  * may be used to endorse or promote products derived from this software
15  * without specific prior written permission.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27  * SUCH DAMAGE.
28  *
29  * This file is part of the Contiki operating system.
30  *
31  */
32 
33 #ifndef JN516X_DEF_H_
34 #define JN516X_DEF_H_
35 
36 #include <inttypes.h>
37 #include <jendefs.h>
38 
39 #undef putchar
40 
41 /* Delay between GO signal and SFD
42  * Measured 153us between GO and preamble. Add 5 bytes (preamble + SFD) air time: 153+5*32 = 313 */
43 #define RADIO_DELAY_BEFORE_TX ((unsigned)US_TO_RTIMERTICKS(313))
44 /* Delay between GO signal and start listening
45  * Measured 104us: between GO signal and start listening */
46 #define RADIO_DELAY_BEFORE_RX ((unsigned)US_TO_RTIMERTICKS(104))
47 /* Delay between the SFD finishes arriving and it is detected in software */
48 #define RADIO_DELAY_BEFORE_DETECT ((unsigned)US_TO_RTIMERTICKS(14))
49 
50 /* uIP endinanness */
51 #define UIP_CONF_BYTE_ORDER UIP_BIG_ENDIAN
52 
53 /* Micromac configuration */
54 
55 #ifndef MIRCOMAC_CONF_BUF_NUM
56 #define MIRCOMAC_CONF_BUF_NUM 2
57 #endif
58 
59 /* 32kHz or 16MHz rtimers? */
60 #ifdef RTIMER_CONF_USE_32KHZ
61 #define RTIMER_USE_32KHZ RTIMER_CONF_USE_32KHZ
62 #else
63 #define RTIMER_USE_32KHZ 0
64 #endif
65 
66 /* Put the device in a sleep mode in idle periods?
67  * If RTIMER_USE_32KHZ is set, the device runs all the time on the 32 kHz oscillator.
68  * If RTIMER_USE_32KHZ is not set, the device runs on the 32 kHz oscillator during sleep,
69  * and switches back to the 32 MHz oscillator (16 MHz rtimer) at wakeup.
70  * */
71 #ifdef JN516X_SLEEP_CONF_ENABLED
72 #define JN516X_SLEEP_ENABLED JN516X_SLEEP_CONF_ENABLED
73 #else
74 #define JN516X_SLEEP_ENABLED 0
75 #endif
76 
77 /* Enable this to get the 32.768kHz oscillator */
78 #ifndef JN516X_EXTERNAL_CRYSTAL_OSCILLATOR
79 #define JN516X_EXTERNAL_CRYSTAL_OSCILLATOR (RTIMER_USE_32KHZ || JN516X_SLEEP_ENABLED)
80 #endif /* JN516X_EXTERNAL_CRYSTAL_OSCILLATOR */
81 
82 /* 8ms timer tick */
83 #define CLOCK_CONF_SECOND 125
84 
85 #if JN516X_EXTERNAL_CRYSTAL_OSCILLATOR
86 #define JN516X_XOSC_SECOND 32768
87 #else
88 #define JN516X_XOSC_SECOND 32000
89 #endif
90 
91 /* Timer conversion*/
92 #if RTIMER_USE_32KHZ
93 #define RADIO_TO_RTIMER(X) ((X) * (JN516X_XOSC_SECOND) / 62500)
94 #else
95  /* RTIMER 16M = 256 * 62500(RADIO) == 2^8 * 62500 */
96 #define RADIO_TO_RTIMER(X) ((rtimer_clock_t)((X) << (int32_t)8L))
97 #endif
98 
99 /* If the timer base a binary 32kHz clock, compensate for this base drift */
100 #if RTIMER_USE_32KHZ && JN516X_EXTERNAL_CRYSTAL_OSCILLATOR
101 /* The drift compared to "true" 10ms slots.
102  * Enable adaptive sync to enable compensation for this.
103  * Slot length 10000 usec
104  * 328 ticks
105  * Tick duration 30.517578125 usec
106  * Real slot duration 10009.765625 usec
107  * Target - real duration = -9.765625 usec
108  * TSCH_CONF_BASE_DRIFT_PPM -977
109  */
110 #define TSCH_CONF_BASE_DRIFT_PPM -977
111 #endif
112 
113 #define DR_11744_DIO2 12
114 #define DR_11744_DIO3 13
115 #define DR_11744_DIO4 14
116 #define DR_11744_DIO5 15
117 #define DR_11744_DIO6 16
118 #define DR_11744_DIO7 17
119 
120 /* Enable power amplifier of JN5168 M05 and M06 modules */
121 #if defined(JN5168_M05) || defined(JN5168_M06)
122 #define RADIO_TEST_MODE RADIO_TEST_MODE_HIGH_PWR
123 #else
124 #define RADIO_TEST_MODE RADIO_TEST_MODE_DISABLED
125 #endif
126 
127 #define TSCH_DEBUG 0
128 
129 #if TSCH_DEBUG
130 #define TSCH_DEBUG_INIT() do { \
131  vAHI_DioSetDirection(0, (1 << DR_11744_DIO2) | (1 << DR_11744_DIO3) | (1 << DR_11744_DIO4) | (1 << DR_11744_DIO5) | (1 << DR_11744_DIO6) | (1 << DR_11744_DIO7)); \
132  vAHI_DioSetOutput(0, (1 << DR_11744_DIO2) | (1 << DR_11744_DIO3) | (1 << DR_11744_DIO4) | (1 << DR_11744_DIO5) | (1 << DR_11744_DIO6) | (1 << DR_11744_DIO7)); } while(0);
133 #define TSCH_DEBUG_INTERRUPT() do { \
134  static dio_state = 0; \
135  dio_state = !dio_state; \
136  if(dio_state) { \
137  vAHI_DioSetOutput((1 << DR_11744_DIO2), 0); \
138  } else { \
139  vAHI_DioSetOutput(0, (1 << DR_11744_DIO2)); \
140  } \
141 } while(0);
142 #define TSCH_DEBUG_RX_EVENT() do { \
143  static dio_state = 0; \
144  dio_state = !dio_state; \
145  if(dio_state) { \
146  vAHI_DioSetOutput((1 << DR_11744_DIO4), 0); \
147  } else { \
148  vAHI_DioSetOutput(0, (1 << DR_11744_DIO4)); \
149  } \
150 } while(0);
151 #define TSCH_DEBUG_TX_EVENT() do { \
152  static dio_state = 0; \
153  dio_state = !dio_state; \
154  if(dio_state) { \
155  vAHI_DioSetOutput((1 << DR_11744_DIO5), 0); \
156  } else { \
157  vAHI_DioSetOutput(0, (1 << DR_11744_DIO5)); \
158  } \
159 } while(0);
160 #define TSCH_DEBUG_SLOT_START() do { \
161  static dio_state = 0; \
162  dio_state = !dio_state; \
163  if(dio_state) { \
164  vAHI_DioSetOutput((1 << DR_11744_DIO3), 0); \
165  } else { \
166  vAHI_DioSetOutput(0, (1 << DR_11744_DIO3)); \
167  } \
168 } while(0);
169 #define TSCH_DEBUG_SLOT_END()
170 #endif /* TSCH_DEBUG */
171 
172 /* UART baud rates */
173 #define UART_RATE_4800 0
174 #define UART_RATE_9600 1
175 #define UART_RATE_19200 2
176 #define UART_RATE_38400 3
177 #define UART_RATE_76800 4
178 #define UART_RATE_115200 5
179 #define UART_RATE_230400 6
180 #define UART_RATE_460800 7
181 #define UART_RATE_500000 8
182 #define UART_RATE_576000 9
183 #define UART_RATE_921600 10
184 #define UART_RATE_1000000 11
185 
186 #define PLATFORM_HAS_LEDS 1
187 #define PLATFORM_HAS_BUTTON (SENSOR_BOARD_DR1174 == 1)
188 #define PLATFORM_HAS_LIGHT (SENSOR_BOARD_DR1175 == 1)
189 #define PLATFORM_HAS_HT (SENSOR_BOARD_DR1175 == 1)
190 #define PLATFORM_HAS_POT (SENSOR_BOARD_DR1199 == 1)
191 #define PLATFORM_HAS_BATTERY 0 /* sensor driver not implemented */
192 #define PLATFORM_HAS_SHT11 0
193 #define PLATFORM_HAS_RADIO 1
194 
195 #define LEDS_CONF_LEGACY_API 1
196 
197 #define PLATFORM_CONF_PROVIDES_MAIN_LOOP 1
198 
199 /* CPU target speed in Hz
200  * RTIMER and peripherals clock is F_CPU/2 */
201 #define F_CPU 32000000UL
202 
203 /* LED ports */
204 /*
205  #define LEDS_PxDIR P5DIR
206  #define LEDS_PxOUT P5OUT
207  #define LEDS_CONF_RED 0x10
208  #define LEDS_CONF_GREEN 0x20
209  #define LEDS_CONF_YELLOW 0x40
210  #define JENNIC_CONF_BUTTON_PIN (IRQ_DIO9|IRQ_DIO10)
211  */
212 
213 #define CC_CONF_REGISTER_ARGS 1
214 #define CC_CONF_FUNCTION_POINTER_ARGS 1
215 #define CC_CONF_VA_ARGS 1
216 #define CC_CONF_INLINE inline
217 
218 #ifdef HAVE_STDINT_H
219 #include <stdint.h>
220 #else
221 #ifndef uint8_t
222 typedef unsigned char uint8_t;
223 typedef unsigned short uint16_t;
224 typedef unsigned long uint32_t;
225 typedef signed char int8_t;
226 typedef short int16_t;
227 typedef long int32_t;
228 typedef unsigned long long uint64_t;
229 typedef long long int64_t;
230 #endif
231 #endif /* !HAVE_STDINT_H */
232 
233 /* Types for clocks and uip_stats */
234 typedef uint16_t uip_stats_t;
235 typedef uint32_t clock_time_t;
236 
237 /* Shall we calibrate the DCO periodically? */
238 #ifndef DCOSYNCH_CONF_ENABLED
239 #define DCOSYNCH_CONF_ENABLED (!(MAC_CONF_WITH_TSCH))
240 #endif /* DCOSYNCH_CONF_ENABLED */
241 
242 /* How often shall we attempt to calibrate DCO?
243  * PS: It should be calibrated upon temperature changes,
244  * but the naive approach of periodic calibration is fine too */
245 #ifndef DCOSYNCH_PERIOD
246 #define DCOSYNCH_PERIOD (5 * 60)
247 #endif /* VCO_CALIBRATION_INTERVAL */
248 
249 /* Disable UART HW flow control */
250 #ifndef UART_HW_FLOW_CTRL
251 #define UART_HW_FLOW_CTRL 0
252 #endif /* UART_HW_FLOW_CTRL */
253 
254 /* Disable UART SW flow control */
255 #ifndef UART_XONXOFF_FLOW_CTRL
256 #define UART_XONXOFF_FLOW_CTRL 1
257 #endif /* UART_XONXOFF_FLOW_CTRL */
258 
259 #ifndef UART_BAUD_RATE
260 #define UART_BAUD_RATE UART_RATE_1000000
261 #endif /* UART_BAUD_RATE */
262 
263 #ifndef UART1_BAUD_RATE
264 #define UART1_BAUD_RATE UART_RATE_1000000
265 #endif
266 #define ENABLE_ADVANCED_BAUD_SELECTION (UART_BAUD_RATE > UART_RATE_115200)
267 
268 /* Extension of LED definitions from leds.h for various JN516x dev boards
269 JN516x Dongle:
270  LEDS_RED Red LED on dongle
271  LEDS_GREEN Green LED on dongle
272  Note: Only one LED can be switch on at the same time
273 
274 DR1174-only:
275  LEDS_GP0 LED D3 on DR1174
276  LEDS_GP1 LED D6 on DR1174
277 
278 DR1174+DR1199:
279  LEDS_RED LED D1 on DR1199
280  LEDS_GREEN LED D2 on DR1199
281  LEDS_BLUE LED D3 on DR1199
282  LEDS_GP0 LED D3 on DR1174
283  LEDS_GP1 LED D6 on DR1174
284 
285 DR1174+DR1175:
286  LEDS_RED Red led in RGB-led with level control on DR1175
287  LEDS_GREEN Green led in RGB-led with level control on DR1175
288  LEDS_BLUE Blue led in RGB-led with level control on DR1175
289  LEDS_WHITE White power led with level control on DR1175
290  LEDS_GP0 LEDS D3 on DR1174
291  LEDS_GP1 LEDS D6 on DR1174
292 */
293 #define LEDS_WHITE 8
294 #define LEDS_GP0 16
295 #define LEDS_GP1 32
296 #define LEDS_GP2 64
297 #define LEDS_GP3 128
298 #define LEDS_CONF_ALL 255
299 
300 #endif /* JN516X_DEF_H_ */