Contiki-NG
cc2538-rf.c
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1 /*
2  * Copyright (c) 2012, Texas Instruments Incorporated - http://www.ti.com/
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  * notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  * notice, this list of conditions and the following disclaimer in the
12  * documentation and/or other materials provided with the distribution.
13  *
14  * 3. Neither the name of the copyright holder nor the names of its
15  * contributors may be used to endorse or promote products derived
16  * from this software without specific prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
21  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
22  * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
23  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
27  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
29  * OF THE POSSIBILITY OF SUCH DAMAGE.
30  */
31 /**
32  * \addtogroup cc2538-rf
33  * @{
34  *
35  * \file
36  * Implementation of the cc2538 RF driver
37  */
38 #include "contiki.h"
39 #include "dev/radio.h"
40 #include "sys/clock.h"
41 #include "sys/rtimer.h"
42 #include "net/packetbuf.h"
43 #include "net/linkaddr.h"
44 #include "net/netstack.h"
45 #include "sys/energest.h"
46 #include "dev/cc2538-rf.h"
47 #include "dev/rfcore.h"
48 #include "dev/sys-ctrl.h"
49 #include "dev/udma.h"
50 #include "reg.h"
51 
52 #include <string.h>
53 /*---------------------------------------------------------------------------*/
54 #define CHECKSUM_LEN 2
55 
56 /* uDMA channel control persistent flags */
57 #define UDMA_TX_FLAGS (UDMA_CHCTL_ARBSIZE_128 | UDMA_CHCTL_XFERMODE_AUTO \
58  | UDMA_CHCTL_SRCSIZE_8 | UDMA_CHCTL_DSTSIZE_8 \
59  | UDMA_CHCTL_SRCINC_8 | UDMA_CHCTL_DSTINC_NONE)
60 
61 #define UDMA_RX_FLAGS (UDMA_CHCTL_ARBSIZE_128 | UDMA_CHCTL_XFERMODE_AUTO \
62  | UDMA_CHCTL_SRCSIZE_8 | UDMA_CHCTL_DSTSIZE_8 \
63  | UDMA_CHCTL_SRCINC_NONE | UDMA_CHCTL_DSTINC_8)
64 
65 /*
66  * uDMA transfer threshold. DMA will only be used to read an incoming frame
67  * if its size is above this threshold
68  */
69 #define UDMA_RX_SIZE_THRESHOLD 3
70 /*---------------------------------------------------------------------------*/
71 #include <stdio.h>
72 #define DEBUG 0
73 #if DEBUG
74 #define PRINTF(...) printf(__VA_ARGS__)
75 #else
76 #define PRINTF(...)
77 #endif
78 /*---------------------------------------------------------------------------*/
79 /* Local RF Flags */
80 #define RX_ACTIVE 0x80
81 #define RF_MUST_RESET 0x40
82 #define RF_ON 0x01
83 
84 /* Bit Masks for the last byte in the RX FIFO */
85 #define CRC_BIT_MASK 0x80
86 #define LQI_BIT_MASK 0x7F
87 /* RSSI Offset */
88 #define RSSI_OFFSET 73
89 
90 /* 192 usec off -> on interval (RX Callib -> SFD Wait). We wait a bit more */
91 #define ONOFF_TIME RTIMER_ARCH_SECOND / 3125
92 /*---------------------------------------------------------------------------*/
93 #ifdef CC2538_RF_CONF_AUTOACK
94 #define CC2538_RF_AUTOACK CC2538_RF_CONF_AUTOACK
95 #else
96 #define CC2538_RF_AUTOACK 1
97 #endif
98 /*---------------------------------------------------------------------------
99  * MAC timer
100  *---------------------------------------------------------------------------*/
101 /* Timer conversion */
102 #define RADIO_TO_RTIMER(X) ((uint32_t)((uint64_t)(X) * RTIMER_ARCH_SECOND / SYS_CTRL_32MHZ))
103 
104 #define CLOCK_STABLE() do { \
105  while ( !(REG(SYS_CTRL_CLOCK_STA) & (SYS_CTRL_CLOCK_STA_XOSC_STB))); \
106  } while(0)
107 /*---------------------------------------------------------------------------*/
108 /* Are we currently in poll mode? Disabled by default */
109 static uint8_t volatile poll_mode = 0;
110 /* Do we perform a CCA before sending? Enabled by default. */
111 static uint8_t send_on_cca = 1;
112 static int8_t rssi;
113 static uint8_t crc_corr;
114 /*---------------------------------------------------------------------------*/
115 static uint8_t rf_flags;
116 static uint8_t rf_channel = IEEE802154_DEFAULT_CHANNEL;
117 
118 static int on(void);
119 static int off(void);
120 /*---------------------------------------------------------------------------*/
121 /* TX Power dBm lookup table. Values from SmartRF Studio v1.16.0 */
122 typedef struct output_config {
123  radio_value_t power;
124  uint8_t txpower_val;
125 } output_config_t;
126 
127 static const output_config_t output_power[] = {
128  { 7, 0xFF },
129  { 5, 0xED },
130  { 3, 0xD5 },
131  { 1, 0xC5 },
132  { 0, 0xB6 },
133  { -1, 0xB0 },
134  { -3, 0xA1 },
135  { -5, 0x91 },
136  { -7, 0x88 },
137  { -9, 0x72 },
138  {-11, 0x62 },
139  {-13, 0x58 },
140  {-15, 0x42 },
141  {-24, 0x00 },
142 };
143 
144 #define OUTPUT_CONFIG_COUNT (sizeof(output_power) / sizeof(output_config_t))
145 
146 /* Max and Min Output Power in dBm */
147 #define OUTPUT_POWER_MIN (output_power[OUTPUT_CONFIG_COUNT - 1].power)
148 #define OUTPUT_POWER_MAX (output_power[0].power)
149 /*---------------------------------------------------------------------------*/
150 PROCESS(cc2538_rf_process, "cc2538 RF driver");
151 /*---------------------------------------------------------------------------*/
152 /**
153  * \brief Get the current operating channel
154  * \return Returns a value in [11,26] representing the current channel
155  */
156 static uint8_t
158 {
159  uint8_t chan = REG(RFCORE_XREG_FREQCTRL) & RFCORE_XREG_FREQCTRL_FREQ;
160 
161  return (chan - CC2538_RF_CHANNEL_MIN) / CC2538_RF_CHANNEL_SPACING
162  + CC2538_RF_CHANNEL_MIN;
163 }
164 /*---------------------------------------------------------------------------*/
165 /**
166  * \brief Set the current operating channel
167  * \param channel The desired channel as a value in [11,26]
168  * \return Returns a value in [11,26] representing the current channel
169  * or a negative value if \e channel was out of bounds
170  */
171 static int8_t
172 set_channel(uint8_t channel)
173 {
174  uint8_t was_on = 0;
175 
176  PRINTF("RF: Set Channel\n");
177 
178  if((channel < CC2538_RF_CHANNEL_MIN) || (channel > CC2538_RF_CHANNEL_MAX)) {
179  return CC2538_RF_CHANNEL_SET_ERROR;
180  }
181 
182  /* Changes to FREQCTRL take effect after the next recalibration */
183 
184  /* If we are off, save state, otherwise switch off and save state */
186  was_on = 1;
187  off();
188  }
189  REG(RFCORE_XREG_FREQCTRL) = CC2538_RF_CHANNEL_MIN +
190  (channel - CC2538_RF_CHANNEL_MIN) * CC2538_RF_CHANNEL_SPACING;
191 
192  /* switch radio back on only if radio was on before - otherwise will turn on radio foor sleepy nodes */
193  if(was_on) {
194  on();
195  }
196 
197  rf_channel = channel;
198 
199  return (int8_t)channel;
200 }
201 /*---------------------------------------------------------------------------*/
202 static radio_value_t
203 get_pan_id(void)
204 {
205  return (radio_value_t)(REG(RFCORE_FFSM_PAN_ID1) << 8 | REG(RFCORE_FFSM_PAN_ID0));
206 }
207 /*---------------------------------------------------------------------------*/
208 static void
209 set_pan_id(uint16_t pan)
210 {
211  REG(RFCORE_FFSM_PAN_ID0) = pan & 0xFF;
212  REG(RFCORE_FFSM_PAN_ID1) = pan >> 8;
213 }
214 /*---------------------------------------------------------------------------*/
215 static radio_value_t
216 get_short_addr(void)
217 {
219 }
220 /*---------------------------------------------------------------------------*/
221 static void
222 set_short_addr(uint16_t addr)
223 {
224  REG(RFCORE_FFSM_SHORT_ADDR0) = addr & 0xFF;
225  REG(RFCORE_FFSM_SHORT_ADDR1) = addr >> 8;
226 }
227 /*---------------------------------------------------------------------------*/
228 /**
229  * \brief Reads the current signal strength (RSSI)
230  * \return The current RSSI in dBm
231  *
232  * This function reads the current RSSI on the currently configured
233  * channel.
234  */
235 static radio_value_t
236 get_rssi(void)
237 {
238  int8_t rssi;
239  uint8_t was_off = 0;
240 
241  /* If we are off, turn on first */
243  was_off = 1;
244  on();
245  }
246 
247  /* Wait on RSSI_VALID */
249 
250  rssi = (int8_t)(REG(RFCORE_XREG_RSSI) & RFCORE_XREG_RSSI_RSSI_VAL) - RSSI_OFFSET;
251 
252  /* If we were off, turn back off */
253  if(was_off) {
254  off();
255  }
256 
257  return rssi;
258 }
259 /*---------------------------------------------------------------------------*/
260 /* Returns the current CCA threshold in dBm */
261 static radio_value_t
262 get_cca_threshold(void)
263 {
264  return (int8_t)(REG(RFCORE_XREG_CCACTRL0) & RFCORE_XREG_CCACTRL0_CCA_THR) - RSSI_OFFSET;
265 }
266 /*---------------------------------------------------------------------------*/
267 /* Sets the CCA threshold in dBm */
268 static void
269 set_cca_threshold(radio_value_t value)
270 {
271  REG(RFCORE_XREG_CCACTRL0) = (value & 0xFF) + RSSI_OFFSET;
272 }
273 /*---------------------------------------------------------------------------*/
274 /* Returns the current TX power in dBm */
275 static radio_value_t
276 get_tx_power(void)
277 {
278  int i;
279  uint8_t reg_val = REG(RFCORE_XREG_TXPOWER) & 0xFF;
280 
281  /*
282  * Find the TXPOWER value in the lookup table
283  * If the value has been written with set_tx_power, we should be able to
284  * find the exact value. However, in case the register has been written in
285  * a different fashion, we return the immediately lower value of the lookup
286  */
287  for(i = 0; i < OUTPUT_CONFIG_COUNT; i++) {
288  if(reg_val >= output_power[i].txpower_val) {
289  return output_power[i].power;
290  }
291  }
292  return OUTPUT_POWER_MIN;
293 }
294 /*---------------------------------------------------------------------------*/
295 /*
296  * Set TX power to 'at least' power dBm
297  * This works with a lookup table. If the value of 'power' does not exist in
298  * the lookup table, TXPOWER will be set to the immediately higher available
299  * value
300  */
301 static void
302 set_tx_power(radio_value_t power)
303 {
304  int i;
305 
306  for(i = OUTPUT_CONFIG_COUNT - 1; i >= 0; --i) {
307  if(power <= output_power[i].power) {
308  REG(RFCORE_XREG_TXPOWER) = output_power[i].txpower_val;
309  return;
310  }
311  }
312 }
313 /*---------------------------------------------------------------------------*/
314 static void
315 set_frame_filtering(uint8_t enable)
316 {
317  if(enable) {
319  } else {
321  }
322 }
323 /*---------------------------------------------------------------------------*/
324 static void
325 mac_timer_init(void)
326 {
327  CLOCK_STABLE();
332  while(REG(RFCORE_SFR_MTCTRL) & RFCORE_SFR_MTCTRL_STATE);
335  while(!(REG(RFCORE_SFR_MTCTRL) & RFCORE_SFR_MTCTRL_STATE));
336 }
337 /*---------------------------------------------------------------------------*/
338 static void
339 set_poll_mode(uint8_t enable)
340 {
341  poll_mode = enable;
342 
343  if(enable) {
344  mac_timer_init();
345  REG(RFCORE_XREG_RFIRQM0) &= ~RFCORE_XREG_RFIRQM0_FIFOP; /* mask out FIFOP interrupt source */
346  REG(RFCORE_SFR_RFIRQF0) &= ~RFCORE_SFR_RFIRQF0_FIFOP; /* clear pending FIFOP interrupt */
347  NVIC_DisableIRQ(RF_TX_RX_IRQn); /* disable RF interrupts */
348  } else {
349  REG(RFCORE_XREG_RFIRQM0) |= RFCORE_XREG_RFIRQM0_FIFOP; /* enable FIFOP interrupt source */
350  NVIC_EnableIRQ(RF_TX_RX_IRQn); /* enable RF interrupts */
351  }
352 }
353 /*---------------------------------------------------------------------------*/
354 static void
355 set_send_on_cca(uint8_t enable)
356 {
357  send_on_cca = enable;
358 }
359 /*---------------------------------------------------------------------------*/
360 static void
361 set_auto_ack(uint8_t enable)
362 {
363  if(enable) {
365  } else {
367  }
368 }
369 /*---------------------------------------------------------------------------*/
370 static uint32_t
371 get_sfd_timestamp(void)
372 {
373  uint64_t sfd, timer_val, buffer;
374 
375  REG(RFCORE_SFR_MTMSEL) = (REG(RFCORE_SFR_MTMSEL) & ~RFCORE_SFR_MTMSEL_MTMSEL) | 0x00000000;
377  timer_val = REG(RFCORE_SFR_MTM0) & RFCORE_SFR_MTM0_MTM0;
378  timer_val |= ((REG(RFCORE_SFR_MTM1) & RFCORE_SFR_MTM1_MTM1) << 8);
380  timer_val |= ((REG(RFCORE_SFR_MTMOVF0) & RFCORE_SFR_MTMOVF0_MTMOVF0) << 16);
381  timer_val |= ((REG(RFCORE_SFR_MTMOVF1) & RFCORE_SFR_MTMOVF1_MTMOVF1) << 24);
383  timer_val |= (buffer << 32);
384 
385  REG(RFCORE_SFR_MTMSEL) = (REG(RFCORE_SFR_MTMSEL) & ~RFCORE_SFR_MTMSEL_MTMSEL) | 0x00000001;
388  sfd |= ((REG(RFCORE_SFR_MTM1) & RFCORE_SFR_MTM1_MTM1) << 8);
390  sfd |= ((REG(RFCORE_SFR_MTMOVF0) & RFCORE_SFR_MTMOVF0_MTMOVF0) << 16);
391  sfd |= ((REG(RFCORE_SFR_MTMOVF1) & RFCORE_SFR_MTMOVF1_MTMOVF1) << 24);
393  sfd |= (buffer << 32);
394 
395  return RTIMER_NOW() - RADIO_TO_RTIMER(timer_val - sfd);
396 }
397 /*---------------------------------------------------------------------------*/
398 /* Netstack API radio driver functions */
399 /*---------------------------------------------------------------------------*/
400 static int
401 channel_clear(void)
402 {
403  int cca;
404  uint8_t was_off = 0;
405 
406  PRINTF("RF: CCA\n");
407 
408  /* If we are off, turn on first */
410  was_off = 1;
411  on();
412  }
413 
414  /* Wait on RSSI_VALID */
416 
418  cca = CC2538_RF_CCA_CLEAR;
419  } else {
420  cca = CC2538_RF_CCA_BUSY;
421  }
422 
423  /* If we were off, turn back off */
424  if(was_off) {
425  off();
426  }
427 
428  return cca;
429 }
430 /*---------------------------------------------------------------------------*/
431 static int
432 on(void)
433 {
434  PRINTF("RF: On\n");
435 
436  if(!(rf_flags & RX_ACTIVE)) {
439 
440  rf_flags |= RX_ACTIVE;
441  }
442 
443  ENERGEST_ON(ENERGEST_TYPE_LISTEN);
444  return 1;
445 }
446 /*---------------------------------------------------------------------------*/
447 static int
448 off(void)
449 {
450  PRINTF("RF: Off\n");
451 
452  /* Wait for ongoing TX to complete (e.g. this could be an outgoing ACK) */
454 
457  }
458 
459  /* Don't turn off if we are off as this will trigger a Strobe Error */
460  if(REG(RFCORE_XREG_RXENABLE) != 0) {
462  }
463 
464  rf_flags &= ~RX_ACTIVE;
465 
466  ENERGEST_OFF(ENERGEST_TYPE_LISTEN);
467  return 1;
468 }
469 /*---------------------------------------------------------------------------*/
470 static int
471 init(void)
472 {
473  PRINTF("RF: Init\n");
474 
475  if(rf_flags & RF_ON) {
476  return 0;
477  }
478 
479  /* Enable clock for the RF Core while Running, in Sleep and Deep Sleep */
480  REG(SYS_CTRL_RCGCRFC) = 1;
481  REG(SYS_CTRL_SCGCRFC) = 1;
482  REG(SYS_CTRL_DCGCRFC) = 1;
483 
484  REG(RFCORE_XREG_CCACTRL0) = CC2538_RF_CCA_THRES;
485 
486  /*
487  * Changes from default values
488  * See User Guide, section "Register Settings Update"
489  */
490  REG(RFCORE_XREG_TXFILTCFG) = 0x09; /** TX anti-aliasing filter bandwidth */
491  REG(RFCORE_XREG_AGCCTRL1) = 0x15; /** AGC target value */
492  REG(ANA_REGS_IVCTRL) = 0x0B; /** Bias currents */
493 
494  /*
495  * Defaults:
496  * Auto CRC; Append RSSI, CRC-OK and Corr. Val.; CRC calculation;
497  * RX and TX modes with FIFOs
498  */
500 
501 #if CC2538_RF_AUTOACK
503 #endif
504 
505  /* Disable source address matching and autopend */
506  REG(RFCORE_XREG_SRCMATCH) = 0;
507 
508  /* MAX FIFOP threshold */
509  REG(RFCORE_XREG_FIFOPCTRL) = CC2538_RF_MAX_PACKET_LEN;
510 
511  /* Set TX Power */
512  REG(RFCORE_XREG_TXPOWER) = CC2538_RF_TX_POWER;
513 
514  set_channel(rf_channel);
515 
516  /* Acknowledge all RF Error interrupts */
519 
521  /* Disable peripheral triggers for the channel */
523 
524  /*
525  * Set the channel's DST. SRC can not be set yet since it will change for
526  * each transfer
527  */
529  }
530 
532  /* Disable peripheral triggers for the channel */
534 
535  /*
536  * Set the channel's SRC. DST can not be set yet since it will change for
537  * each transfer
538  */
540  }
541 
542  set_poll_mode(poll_mode);
543 
544  process_start(&cc2538_rf_process, NULL);
545 
546  rf_flags |= RF_ON;
547 
548  ENERGEST_ON(ENERGEST_TYPE_LISTEN);
549 
550  return 1;
551 }
552 /*---------------------------------------------------------------------------*/
553 static int
554 prepare(const void *payload, unsigned short payload_len)
555 {
556  uint8_t i;
557 
558  PRINTF("RF: Prepare 0x%02x bytes\n", payload_len + CHECKSUM_LEN);
559 
560  /*
561  * When we transmit in very quick bursts, make sure previous transmission
562  * is not still in progress before re-writing to the TX FIFO
563  */
565 
566  if((rf_flags & RX_ACTIVE) == 0) {
567  on();
568  }
569 
571 
572  PRINTF("RF: data = ");
573  /* Send the phy length byte first */
574  REG(RFCORE_SFR_RFDATA) = payload_len + CHECKSUM_LEN;
575 
577  PRINTF("<uDMA payload>");
578 
579  /* Set the transfer source's end address */
581  (uint32_t)(payload) + payload_len - 1);
582 
583  /* Configure the control word */
585  UDMA_TX_FLAGS | udma_xfer_size(payload_len));
586 
587  /* Enabled the RF TX uDMA channel */
589 
590  /* Trigger the uDMA transfer */
592 
593  /*
594  * No need to wait for this to end. Even if transmit() gets called
595  * immediately, the uDMA controller will stream the frame to the TX FIFO
596  * faster than transmit() can empty it
597  */
598  } else {
599  for(i = 0; i < payload_len; i++) {
600  REG(RFCORE_SFR_RFDATA) = ((unsigned char *)(payload))[i];
601  PRINTF("%02x", ((unsigned char *)(payload))[i]);
602  }
603  }
604  PRINTF("\n");
605 
606  return 0;
607 }
608 /*---------------------------------------------------------------------------*/
609 static int
610 transmit(unsigned short transmit_len)
611 {
612  uint8_t counter;
613  int ret = RADIO_TX_ERR;
614  rtimer_clock_t t0;
615  uint8_t was_off = 0;
616 
617  PRINTF("RF: Transmit\n");
618 
619  if(!(rf_flags & RX_ACTIVE)) {
620  t0 = RTIMER_NOW();
621  on();
622  was_off = 1;
623  while(RTIMER_CLOCK_LT(RTIMER_NOW(), t0 + ONOFF_TIME));
624  }
625 
626  if(send_on_cca) {
627  if(channel_clear() == CC2538_RF_CCA_BUSY) {
628  return RADIO_TX_COLLISION;
629  }
630  }
631 
632  /*
633  * prepare() double checked that TX_ACTIVE is low. If SFD is high we are
634  * receiving. Abort transmission and bail out with RADIO_TX_COLLISION
635  */
637  return RADIO_TX_COLLISION;
638  }
639 
640  /* Start the transmission */
641  ENERGEST_SWITCH(ENERGEST_TYPE_LISTEN, ENERGEST_TYPE_TRANSMIT);
642 
644 
645  counter = 0;
647  && (counter++ < 3)) {
648  clock_delay_usec(6);
649  }
650 
651  if(!(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_TX_ACTIVE)) {
652  PRINTF("RF: TX never active.\n");
654  ret = RADIO_TX_ERR;
655  } else {
656  /* Wait for the transmission to finish */
657  while(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_TX_ACTIVE);
658  ret = RADIO_TX_OK;
659  }
660  ENERGEST_SWITCH(ENERGEST_TYPE_TRANSMIT, ENERGEST_TYPE_LISTEN);
661 
662  if(was_off) {
663  off();
664  }
665 
666  return ret;
667 }
668 /*---------------------------------------------------------------------------*/
669 static int
670 send(const void *payload, unsigned short payload_len)
671 {
672  prepare(payload, payload_len);
673  return transmit(payload_len);
674 }
675 /*---------------------------------------------------------------------------*/
676 static int
677 read(void *buf, unsigned short bufsize)
678 {
679  uint8_t i;
680  uint8_t len;
681 
682  PRINTF("RF: Read\n");
683 
685  return 0;
686  }
687 
688  /* Check the length */
689  len = REG(RFCORE_SFR_RFDATA);
690 
691  /* Check for validity */
692  if(len > CC2538_RF_MAX_PACKET_LEN) {
693  /* Oops, we must be out of sync. */
694  PRINTF("RF: bad sync\n");
695 
697  return 0;
698  }
699 
700  if(len <= CC2538_RF_MIN_PACKET_LEN) {
701  PRINTF("RF: too short\n");
702 
704  return 0;
705  }
706 
707  if(len - CHECKSUM_LEN > bufsize) {
708  PRINTF("RF: too long\n");
709 
711  return 0;
712  }
713 
714  /* If we reach here, chances are the FIFO is holding a valid frame */
715  PRINTF("RF: read (0x%02x bytes) = ", len);
716  len -= CHECKSUM_LEN;
717 
718  /* Don't bother with uDMA for short frames (e.g. ACKs) */
719  if(CC2538_RF_CONF_RX_USE_DMA && len > UDMA_RX_SIZE_THRESHOLD) {
720  PRINTF("<uDMA payload>");
721 
722  /* Set the transfer destination's end address */
724  (uint32_t)(buf) + len - 1);
725 
726  /* Configure the control word */
728  UDMA_RX_FLAGS | udma_xfer_size(len));
729 
730  /* Enabled the RF RX uDMA channel */
732 
733  /* Trigger the uDMA transfer */
735 
736  /* Wait for the transfer to complete. */
738  } else {
739  for(i = 0; i < len; ++i) {
740  ((unsigned char *)(buf))[i] = REG(RFCORE_SFR_RFDATA);
741  PRINTF("%02x", ((unsigned char *)(buf))[i]);
742  }
743  }
744 
745  /* Read the RSSI and CRC/Corr bytes */
746  rssi = ((int8_t)REG(RFCORE_SFR_RFDATA)) - RSSI_OFFSET;
747  crc_corr = REG(RFCORE_SFR_RFDATA);
748 
749  PRINTF("%02x%02x\n", (uint8_t)rssi, crc_corr);
750 
751  /* MS bit CRC OK/Not OK, 7 LS Bits, Correlation value */
752  if(crc_corr & CRC_BIT_MASK) {
753  packetbuf_set_attr(PACKETBUF_ATTR_RSSI, rssi);
754  packetbuf_set_attr(PACKETBUF_ATTR_LINK_QUALITY, crc_corr & LQI_BIT_MASK);
755  } else {
756  PRINTF("RF: Bad CRC\n");
758  return 0;
759  }
760 
761  if(!poll_mode) {
762  /* If FIFOP==1 and FIFO==0 then we had a FIFO overflow at some point. */
763  if(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_FIFOP) {
765  process_poll(&cc2538_rf_process);
766  } else {
768  }
769  }
770  }
771 
772  return len;
773 }
774 /*---------------------------------------------------------------------------*/
775 static int
776 receiving_packet(void)
777 {
778  PRINTF("RF: Receiving\n");
779 
780  /*
781  * SFD high while transmitting and receiving.
782  * TX_ACTIVE high only when transmitting
783  *
784  * FSMSTAT1 & (TX_ACTIVE | SFD) == SFD <=> receiving
785  */
786  return (REG(RFCORE_XREG_FSMSTAT1)
789 }
790 /*---------------------------------------------------------------------------*/
791 static int
792 pending_packet(void)
793 {
794  PRINTF("RF: Pending\n");
795 
797 }
798 /*---------------------------------------------------------------------------*/
799 static radio_result_t
800 get_value(radio_param_t param, radio_value_t *value)
801 {
802  if(!value) {
803  return RADIO_RESULT_INVALID_VALUE;
804  }
805 
806  switch(param) {
807  case RADIO_PARAM_POWER_MODE:
809  ? RADIO_POWER_MODE_OFF : RADIO_POWER_MODE_ON;
810  return RADIO_RESULT_OK;
811  case RADIO_PARAM_CHANNEL:
812  *value = (radio_value_t)get_channel();
813  return RADIO_RESULT_OK;
814  case RADIO_PARAM_PAN_ID:
815  *value = get_pan_id();
816  return RADIO_RESULT_OK;
817  case RADIO_PARAM_16BIT_ADDR:
818  *value = get_short_addr();
819  return RADIO_RESULT_OK;
820  case RADIO_PARAM_RX_MODE:
821  *value = 0;
824  }
826  *value |= RADIO_RX_MODE_AUTOACK;
827  }
828  if(poll_mode) {
829  *value |= RADIO_RX_MODE_POLL_MODE;
830  }
831  return RADIO_RESULT_OK;
832  case RADIO_PARAM_TX_MODE:
833  *value = 0;
834  if(send_on_cca) {
835  *value |= RADIO_TX_MODE_SEND_ON_CCA;
836  }
837  return RADIO_RESULT_OK;
838  case RADIO_PARAM_TXPOWER:
839  *value = get_tx_power();
840  return RADIO_RESULT_OK;
841  case RADIO_PARAM_CCA_THRESHOLD:
842  *value = get_cca_threshold();
843  return RADIO_RESULT_OK;
844  case RADIO_PARAM_RSSI:
845  *value = get_rssi();
846  return RADIO_RESULT_OK;
847  case RADIO_PARAM_LAST_RSSI:
848  *value = rssi;
849  return RADIO_RESULT_OK;
850  case RADIO_PARAM_LAST_LINK_QUALITY:
851  *value = crc_corr & LQI_BIT_MASK;
852  return RADIO_RESULT_OK;
853  case RADIO_CONST_CHANNEL_MIN:
854  *value = CC2538_RF_CHANNEL_MIN;
855  return RADIO_RESULT_OK;
856  case RADIO_CONST_CHANNEL_MAX:
857  *value = CC2538_RF_CHANNEL_MAX;
858  return RADIO_RESULT_OK;
859  case RADIO_CONST_TXPOWER_MIN:
860  *value = OUTPUT_POWER_MIN;
861  return RADIO_RESULT_OK;
862  case RADIO_CONST_TXPOWER_MAX:
863  *value = OUTPUT_POWER_MAX;
864  return RADIO_RESULT_OK;
865  default:
866  return RADIO_RESULT_NOT_SUPPORTED;
867  }
868 }
869 /*---------------------------------------------------------------------------*/
870 static radio_result_t
871 set_value(radio_param_t param, radio_value_t value)
872 {
873  switch(param) {
874  case RADIO_PARAM_POWER_MODE:
875  if(value == RADIO_POWER_MODE_ON) {
876  on();
877  return RADIO_RESULT_OK;
878  }
879  if(value == RADIO_POWER_MODE_OFF) {
880  off();
881  return RADIO_RESULT_OK;
882  }
883  return RADIO_RESULT_INVALID_VALUE;
884  case RADIO_PARAM_CHANNEL:
885  if(value < CC2538_RF_CHANNEL_MIN ||
886  value > CC2538_RF_CHANNEL_MAX) {
887  return RADIO_RESULT_INVALID_VALUE;
888  }
889  if(set_channel(value) == CC2538_RF_CHANNEL_SET_ERROR) {
890  return RADIO_RESULT_ERROR;
891  }
892  return RADIO_RESULT_OK;
893  case RADIO_PARAM_PAN_ID:
894  set_pan_id(value & 0xffff);
895  return RADIO_RESULT_OK;
896  case RADIO_PARAM_16BIT_ADDR:
897  set_short_addr(value & 0xffff);
898  return RADIO_RESULT_OK;
899  case RADIO_PARAM_RX_MODE:
900  if(value & ~(RADIO_RX_MODE_ADDRESS_FILTER |
901  RADIO_RX_MODE_AUTOACK |
902  RADIO_RX_MODE_POLL_MODE)) {
903  return RADIO_RESULT_INVALID_VALUE;
904  }
905 
906  set_frame_filtering((value & RADIO_RX_MODE_ADDRESS_FILTER) != 0);
907  set_auto_ack((value & RADIO_RX_MODE_AUTOACK) != 0);
908  set_poll_mode((value & RADIO_RX_MODE_POLL_MODE) != 0);
909 
910  return RADIO_RESULT_OK;
911  case RADIO_PARAM_TX_MODE:
912  if(value & ~(RADIO_TX_MODE_SEND_ON_CCA)) {
913  return RADIO_RESULT_INVALID_VALUE;
914  }
915  set_send_on_cca((value & RADIO_TX_MODE_SEND_ON_CCA) != 0);
916  return RADIO_RESULT_OK;
917  case RADIO_PARAM_TXPOWER:
918  if(value < OUTPUT_POWER_MIN || value > OUTPUT_POWER_MAX) {
919  return RADIO_RESULT_INVALID_VALUE;
920  }
921 
922  set_tx_power(value);
923  return RADIO_RESULT_OK;
924  case RADIO_PARAM_CCA_THRESHOLD:
925  set_cca_threshold(value);
926  return RADIO_RESULT_OK;
927  default:
928  return RADIO_RESULT_NOT_SUPPORTED;
929  }
930 }
931 /*---------------------------------------------------------------------------*/
932 static radio_result_t
933 get_object(radio_param_t param, void *dest, size_t size)
934 {
935  uint8_t *target;
936  int i;
937 
938  if(param == RADIO_PARAM_64BIT_ADDR) {
939  if(size != 8 || !dest) {
940  return RADIO_RESULT_INVALID_VALUE;
941  }
942 
943  target = dest;
944  for(i = 0; i < 8; i++) {
945  target[i] = ((uint32_t *)RFCORE_FFSM_EXT_ADDR0)[7 - i] & 0xFF;
946  }
947 
948  return RADIO_RESULT_OK;
949  }
950 
951  if(param == RADIO_PARAM_LAST_PACKET_TIMESTAMP) {
952  if(size != sizeof(rtimer_clock_t) || !dest) {
953  return RADIO_RESULT_INVALID_VALUE;
954  }
955  *(rtimer_clock_t *)dest = get_sfd_timestamp();
956  return RADIO_RESULT_OK;
957  }
958 
959  return RADIO_RESULT_NOT_SUPPORTED;
960 }
961 /*---------------------------------------------------------------------------*/
962 static radio_result_t
963 set_object(radio_param_t param, const void *src, size_t size)
964 {
965  int i;
966 
967  if(param == RADIO_PARAM_64BIT_ADDR) {
968  if(size != 8 || !src) {
969  return RADIO_RESULT_INVALID_VALUE;
970  }
971 
972  for(i = 0; i < 8; i++) {
973  ((uint32_t *)RFCORE_FFSM_EXT_ADDR0)[i] = ((uint8_t *)src)[7 - i];
974  }
975 
976  return RADIO_RESULT_OK;
977  }
978  return RADIO_RESULT_NOT_SUPPORTED;
979 }
980 /*---------------------------------------------------------------------------*/
982  init,
983  prepare,
984  transmit,
985  send,
986  read,
990  on,
991  off,
992  get_value,
993  set_value,
994  get_object,
995  set_object
996 };
997 /*---------------------------------------------------------------------------*/
998 /**
999  * \brief Implementation of the cc2538 RF driver process
1000  *
1001  * This process is started by init(). It simply sits there waiting for
1002  * an event. Upon frame reception, the RX ISR will poll this process.
1003  * Subsequently, the contiki core will generate an event which will
1004  * call this process so that the received frame can be picked up from
1005  * the RF RX FIFO
1006  *
1007  */
1008 PROCESS_THREAD(cc2538_rf_process, ev, data)
1009 {
1010  int len;
1011  PROCESS_BEGIN();
1012 
1013  while(1) {
1014  /* Only if we are not in poll mode oder we are in poll mode and transceiver has to be reset */
1015  PROCESS_YIELD_UNTIL((!poll_mode || (poll_mode && (rf_flags & RF_MUST_RESET))) && (ev == PROCESS_EVENT_POLL));
1016 
1017  if(!poll_mode) {
1018  packetbuf_clear();
1020 
1021  if(len > 0) {
1022  packetbuf_set_datalen(len);
1023 
1024  NETSTACK_MAC.input();
1025  }
1026  }
1027 
1028  /* If we were polled due to an RF error, reset the transceiver */
1029  if(rf_flags & RF_MUST_RESET) {
1030  uint8_t was_on;
1031  rf_flags = 0;
1032 
1033  /* save state so we know if to switch on again after re-init */
1035  was_on = 0;
1036  } else {
1037  was_on = 1;
1038  }
1039  off();
1040  init();
1041  if(was_on) {
1042  /* switch back on */
1043  on();
1044  }
1045  }
1046  }
1047 
1048  PROCESS_END();
1049 }
1050 /*---------------------------------------------------------------------------*/
1051 /**
1052  * \brief The cc2538 RF RX/TX ISR
1053  *
1054  * This is the interrupt service routine for all RF interrupts relating
1055  * to RX and TX. Error conditions are handled by cc2538_rf_err_isr().
1056  * Currently, we only acknowledge the FIFOP interrupt source.
1057  */
1058 void
1060 {
1061  if(!poll_mode) {
1062  process_poll(&cc2538_rf_process);
1063  }
1064 
1065  /* We only acknowledge FIFOP so we can safely wipe out the entire SFR */
1066  REG(RFCORE_SFR_RFIRQF0) = 0;
1067 }
1068 /*---------------------------------------------------------------------------*/
1069 /**
1070  * \brief The cc2538 RF Error ISR
1071  *
1072  * This is the interrupt service routine for all RF errors. We
1073  * acknowledge every error type and instead of trying to be smart and
1074  * act differently depending on error condition, we simply reset the
1075  * transceiver. RX FIFO overflow is an exception, we ignore this error
1076  * since read() handles it anyway.
1077  *
1078  * However, we don't want to reset within this ISR. If the error occurs
1079  * while we are reading a frame out of the FIFO, trashing the FIFO in
1080  * the middle of read(), would result in further errors (RX underflows).
1081  *
1082  * Instead, we set a flag and poll the driver process. The process will
1083  * reset the transceiver without any undesirable consequences.
1084  */
1085 void
1087 {
1088  PRINTF("RF Error: 0x%08lx\n", REG(RFCORE_SFR_RFERRF));
1089 
1090  /* If the error is not an RX FIFO overflow, set a flag */
1092  rf_flags |= RF_MUST_RESET;
1093  }
1094 
1095  REG(RFCORE_SFR_RFERRF) = 0;
1096 
1097  process_poll(&cc2538_rf_process);
1098 }
1099 /*---------------------------------------------------------------------------*/
1100 void
1102 {
1103  set_frame_filtering(p);
1104 }
1105 /*---------------------------------------------------------------------------*/
1106 /** @} */
#define RFCORE_XREG_RSSI_RSSI_VAL
RSSI estimate.
Definition: rfcore-xreg.h:320
radio_result_t(* get_object)(radio_param_t param, void *dest, size_t size)
Get a radio parameter object.
Definition: radio.h:280
#define RFCORE_FFSM_SHORT_ADDR0
Local address information.
Definition: rfcore-ffsm.h:64
void * packetbuf_dataptr(void)
Get a pointer to the data in the packetbuf.
Definition: packetbuf.c:143
Top-level header file for cc2538 RF Core registers.
int(* prepare)(const void *payload, unsigned short payload_len)
Prepare the radio with a packet to be sent.
Definition: radio.h:242
#define RFCORE_SFR_MTM1_MTM1
Register[15:8].
Definition: rfcore-sfr.h:116
#define RFCORE_XREG_SRCMATCH
Source address matching.
Definition: rfcore-xreg.h:46
#define SYS_CTRL_RCGCRFC
RF Core clocks - active mode.
Definition: sys-ctrl.h:93
#define PROCESS(name, strname)
Declare a process.
Definition: process.h:307
#define RFCORE_SFR_MTCTRL_SYNC
Timer start/stop timing.
Definition: rfcore-sfr.h:79
#define RFCORE_SFR_MTMOVF0
MAC Timer MUX overflow 0.
Definition: rfcore-sfr.h:54
#define RFCORE_XREG_FRMCTRL0_AUTOACK
Transmit ACK frame enable.
Definition: rfcore-xreg.h:211
Header file for the cc2538 System Control driver.
#define RFCORE_XREG_FSMSTAT0
Radio status register.
Definition: rfcore-xreg.h:62
void udma_set_channel_dst(uint8_t channel, uint32_t dst_end)
Sets the channel&#39;s destination address.
Definition: udma.c:80
void packetbuf_clear(void)
Clear and reset the packetbuf.
Definition: packetbuf.c:75
#define RFCORE_SFR_MTM1
MAC Timer MUX register 1.
Definition: rfcore-sfr.h:51
#define SYS_CTRL_SCGCRFC
RF Core clocks - Sleep mode.
Definition: sys-ctrl.h:94
#define RFCORE_XREG_FSMSTAT1
Radio status register.
Definition: rfcore-xreg.h:63
static uip_ds6_addr_t * addr
Pointer to a nbr cache entry.
Definition: uip-nd6.c:115
#define RFCORE_SFR_MTCTRL_LATCH_MODE
OVF counter latch mode.
Definition: rfcore-sfr.h:77
Header file for the cc2538 RF driver.
Header file for the energy estimation mechanism
#define CC2538_RF_CSP_ISFLUSHTX()
Flush the TX FIFO.
Definition: cc2538-rf.h:122
#define PROCESS_YIELD_UNTIL(c)
Yield the currently running process until a condition occurs.
Definition: process.h:178
Header file for the radio API
#define PROCESS_BEGIN()
Define the beginning of a process.
Definition: process.h:120
#define RFCORE_SFR_MTMOVF0_MTMOVF0
Register[7:0].
Definition: rfcore-sfr.h:124
Header file for the link-layer address representation
#define PROCESS_END()
Define the end of a process.
Definition: process.h:131
int(* receiving_packet)(void)
Check if the radio driver is currently receiving a packet.
Definition: radio.h:258
#define RFCORE_FFSM_SHORT_ADDR1
Local address information.
Definition: rfcore-ffsm.h:65
#define RFCORE_SFR_MTCTRL_RUN
Timer start/stop.
Definition: rfcore-sfr.h:80
radio_result_t(* set_value)(radio_param_t param, radio_value_t value)
Set a radio parameter value.
Definition: radio.h:273
int(* pending_packet)(void)
Check if the radio driver has just received a packet.
Definition: radio.h:261
void clock_delay_usec(uint16_t dt)
Delay a given number of microseconds.
Definition: clock.c:150
The structure of a device driver for a radio in Contiki.
Definition: radio.h:237
#define RFCORE_XREG_FSMSTAT1_SFD
SFD was sent/received.
Definition: rfcore-xreg.h:283
Header file with register manipulation macro definitions.
#define RFCORE_XREG_FRMFILT0_FRAME_FILTER_EN
Enables frame filtering.
Definition: rfcore-xreg.h:149
#define RFCORE_XREG_CCACTRL0_CCA_THR
Clear-channel-assessment.
Definition: rfcore-xreg.h:307
int(* channel_clear)(void)
Perform a Clear-Channel Assessment (CCA) to find out if there is a packet in the air or not...
Definition: radio.h:255
int radio_value_t
Each radio has a set of parameters that designate the current configuration and state of the radio...
Definition: radio.h:88
#define CC2538_RF_CONF_RX_DMA_CHAN
RAM -> RF DMA channel.
Definition: cc2538-conf.h:96
#define RFCORE_SFR_MTMSEL
MAC Timer multiplex select.
Definition: rfcore-sfr.h:49
#define RFCORE_SFR_RFDATA
TX/RX FIFO data.
Definition: rfcore-sfr.h:60
const struct radio_driver cc2538_rf_driver
The NETSTACK data structure for the cc2538 RF driver.
Definition: cc2538-rf.c:981
Header file with register, macro and function declarations for the cc2538 micro-DMA controller module...
#define CC2538_RF_CONF_TX_DMA_CHAN
RF -> RAM DMA channel.
Definition: cc2538-conf.h:95
#define RFCORE_XREG_FSMSTAT1_TX_ACTIVE
Status signal - TX states.
Definition: rfcore-xreg.h:287
void udma_channel_mask_set(uint8_t channel)
Disable peripheral triggers for a uDMA channel.
Definition: udma.c:204
#define RFCORE_XREG_RFERRM_RFERRM
RF error interrupt mask.
Definition: rfcore-xreg.h:393
__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
Disable External Interrupt.
Definition: core_cm0.h:653
#define IEEE802154_DEFAULT_CHANNEL
The default channel for IEEE 802.15.4 networks.
Definition: mac.h:52
#define RTIMER_NOW()
Get the current clock time.
Definition: rtimer.h:158
#define RFCORE_XREG_FSMSTAT0_FSM_FFCTRL_STATE
FIFO and FFCTRL status.
Definition: rfcore-xreg.h:275
#define RFCORE_FFSM_EXT_ADDR0
Local address information.
Definition: rfcore-ffsm.h:54
__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
Enable External Interrupt.
Definition: core_cm0.h:642
#define CC2538_RF_CSP_ISRXON()
Send an RX ON command strobe to the CSP.
Definition: cc2538-rf.h:96
RF Tx/Rx Interrupt.
Definition: cc2538_cm3.h:109
void udma_set_channel_src(uint8_t channel, uint32_t src_end)
Sets the channels source address.
Definition: udma.c:70
#define RFCORE_XREG_TXPOWER
Controls the output power.
Definition: rfcore-xreg.h:60
void(* input)(void)
Callback for getting notified of incoming packet.
Definition: mac.h:72
#define RFCORE_XREG_FSMSTAT1_FIFO
FIFO status.
Definition: rfcore-xreg.h:281
#define CC2538_RF_CSP_ISRFOFF()
Send a RF OFF command strobe to the CSP.
Definition: cc2538-rf.h:108
#define RFCORE_XREG_RFIRQM0
RF interrupt masks.
Definition: rfcore-xreg.h:79
int(* send)(const void *payload, unsigned short payload_len)
Prepare & transmit a packet.
Definition: radio.h:248
int(* transmit)(unsigned short transmit_len)
Send the packet that has previously been prepared.
Definition: radio.h:245
#define RFCORE_XREG_RSSISTAT
RSSI valid status register.
Definition: rfcore-xreg.h:69
void process_poll(struct process *p)
Request a process to be polled.
Definition: process.c:371
int(* off)(void)
Turn the radio off.
Definition: radio.h:267
#define RFCORE_FFSM_PAN_ID0
Local address information.
Definition: rfcore-ffsm.h:62
#define RFCORE_XREG_FRMCTRL0
Frame handling.
Definition: rfcore-xreg.h:53
#define RFCORE_XREG_FSMSTAT1_FIFOP
FIFOP status.
Definition: rfcore-xreg.h:282
#define RFCORE_XREG_RFIRQM0_FIFOP
RX FIFO exceeded threshold.
Definition: rfcore-xreg.h:373
void cc2538_rf_err_isr(void)
The cc2538 RF Error ISR.
Definition: cc2538-rf.c:1086
#define RFCORE_XREG_FREQCTRL
Controls the RF frequency.
Definition: rfcore-xreg.h:59
void udma_channel_enable(uint8_t channel)
Enables a uDMA channel.
Definition: udma.c:120
Header file for the real-time timer module.
#define RFCORE_SFR_MTM0
MAC Timer MUX register 0.
Definition: rfcore-sfr.h:50
#define PACKETBUF_SIZE
The size of the packetbuf, in bytes.
Definition: packetbuf.h:66
#define RFCORE_XREG_FSMSTAT1_CCA
Clear channel assessment.
Definition: rfcore-xreg.h:284
#define RFCORE_XREG_TXFILTCFG
TX filter configuration.
Definition: rfcore-xreg.h:141
#define RFCORE_FFSM_PAN_ID1
Local address information.
Definition: rfcore-ffsm.h:63
#define RADIO_RX_MODE_ADDRESS_FILTER
The radio reception mode controls address filtering and automatic transmission of acknowledgements in...
Definition: radio.h:204
#define RFCORE_SFR_MTMOVF2
MAC Timer MUX overflow 2.
Definition: rfcore-sfr.h:52
void udma_channel_sw_request(uint8_t channel)
Generate a software trigger to start a transfer.
Definition: udma.c:225
#define RFCORE_XREG_FIFOPCTRL
FIFOP threshold.
Definition: rfcore-xreg.h:64
#define RADIO_TX_MODE_SEND_ON_CCA
The radio transmission mode controls whether transmissions should be done using clear channel assessm...
Definition: radio.h:216
#define RFCORE_SFR_RFIRQF0_FIFOP
RX FIFO exceeded threshold.
Definition: rfcore-sfr.h:164
static int8_t set_channel(uint8_t channel)
Set the current operating channel.
Definition: cc2538-rf.c:172
void cc2538_rf_rx_tx_isr(void)
The cc2538 RF RX/TX ISR.
Definition: cc2538-rf.c:1059
#define RFCORE_SFR_MTMOVF1_MTMOVF1
Register[15:8].
Definition: rfcore-sfr.h:123
RF Error Interrupt.
Definition: cc2538_cm3.h:110
#define RFCORE_XREG_RFERRM
RF error interrupt mask.
Definition: rfcore-xreg.h:81
static radio_value_t get_rssi(void)
Reads the current signal strength (RSSI)
Definition: cc2538-rf.c:236
#define RFCORE_SFR_MTCTRL_STATE
State of MAC Timer.
Definition: rfcore-sfr.h:78
#define CC2538_RF_CSP_ISTXON()
Send a TX ON command strobe to the CSP.
Definition: cc2538-rf.h:102
#define RFCORE_SFR_MTMOVF2_MTMOVF2
Register[23:16].
Definition: rfcore-sfr.h:117
#define RFCORE_SFR_MTCTRL
MAC Timer control register.
Definition: rfcore-sfr.h:46
int(* read)(void *buf, unsigned short buf_len)
Read a received packet into a buffer.
Definition: radio.h:251
#define RFCORE_XREG_CCACTRL0
CCA threshold.
Definition: rfcore-xreg.h:66
#define CC2538_RF_CSP_ISFLUSHRX()
Flush the RX FIFO.
Definition: cc2538-rf.h:114
#define RFCORE_XREG_RSSI
RSSI status register.
Definition: rfcore-xreg.h:68
#define RFCORE_SFR_MTMOVF1
MAC Timer MUX overflow 1.
Definition: rfcore-sfr.h:53
Header file for the Packet buffer (packetbuf) management
Include file for the Contiki low-layer network stack (NETSTACK)
radio_result_t(* get_value)(radio_param_t param, radio_value_t *value)
Get a radio parameter value.
Definition: radio.h:270
#define RFCORE_XREG_FRMCTRL0_AUTOCRC
Auto CRC generation / checking.
Definition: rfcore-xreg.h:210
#define RFCORE_XREG_AGCCTRL1
AGC reference level.
Definition: rfcore-xreg.h:93
void udma_set_channel_control_word(uint8_t channel, uint32_t ctrl)
Configure the channel&#39;s control word.
Definition: udma.c:90
#define RFCORE_XREG_RSSISTAT_RSSI_VALID
RSSI value is valid.
Definition: rfcore-xreg.h:327
PROCESS_THREAD(cc2538_rf_process, ev, data)
Implementation of the cc2538 RF driver process.
Definition: cc2538-rf.c:1008
#define udma_xfer_size(len)
Calculate the value of the xfersize field in the control structure.
Definition: udma.h:697
#define RFCORE_XREG_RXENABLE_RXENMASK
Enables the receiver.
Definition: rfcore-xreg.h:228
#define CC2538_RF_CONF_RX_USE_DMA
RF RX over DMA.
Definition: cc2538-conf.h:232
static int init(void)
Definition: cc2538-rf.c:471
uint8_t udma_channel_get_mode(uint8_t channel)
Retrieve the current mode for a channel.
Definition: udma.c:235
#define RFCORE_SFR_RFERRF
RF error interrupt flags.
Definition: rfcore-sfr.h:61
#define RFCORE_SFR_MTMSEL_MTMOVFSEL
MTMOVF register select.
Definition: rfcore-sfr.h:108
void cc2538_rf_set_promiscous_mode(char p)
Turn promiscous mode on or off.
Definition: cc2538-rf.c:1101
radio_result_t(* set_object)(radio_param_t param, const void *src, size_t size)
Set a radio parameter object.
Definition: radio.h:286
#define RFCORE_SFR_RFERRF_RXOVERF
RX FIFO overflowed.
Definition: rfcore-sfr.h:140
#define RFCORE_SFR_MTMSEL_MTMSEL
MTM register select.
Definition: rfcore-sfr.h:109
#define SYS_CTRL_DCGCRFC
RF Core clocks - PM0.
Definition: sys-ctrl.h:95
#define RFCORE_XREG_RXENABLE
RX enabling.
Definition: rfcore-xreg.h:55
void packetbuf_set_datalen(uint16_t len)
Set the length of the data in the packetbuf.
Definition: packetbuf.c:136
int(* on)(void)
Turn the radio on.
Definition: radio.h:264
#define CC2538_RF_CONF_TX_USE_DMA
RF TX over DMA.
Definition: cc2538-conf.h:228
#define RFCORE_SFR_MTM0_MTM0
Register[7:0].
Definition: rfcore-sfr.h:115
#define RFCORE_SFR_RFIRQF0
RF interrupt flags.
Definition: rfcore-sfr.h:63
#define RFCORE_XREG_FREQCTRL_FREQ
Frequency control word.
Definition: rfcore-xreg.h:252
void process_start(struct process *p, process_data_t data)
Start a process.
Definition: process.c:99
static uint8_t get_channel()
Get the current operating channel.
Definition: cc2538-rf.c:157
#define RFCORE_XREG_FRMFILT0
Frame filtering control.
Definition: rfcore-xreg.h:44