40 #include "sys/clock.h" 54 #define CHECKSUM_LEN 2 57 #define UDMA_TX_FLAGS (UDMA_CHCTL_ARBSIZE_128 | UDMA_CHCTL_XFERMODE_AUTO \ 58 | UDMA_CHCTL_SRCSIZE_8 | UDMA_CHCTL_DSTSIZE_8 \ 59 | UDMA_CHCTL_SRCINC_8 | UDMA_CHCTL_DSTINC_NONE) 61 #define UDMA_RX_FLAGS (UDMA_CHCTL_ARBSIZE_128 | UDMA_CHCTL_XFERMODE_AUTO \ 62 | UDMA_CHCTL_SRCSIZE_8 | UDMA_CHCTL_DSTSIZE_8 \ 63 | UDMA_CHCTL_SRCINC_NONE | UDMA_CHCTL_DSTINC_8) 69 #define UDMA_RX_SIZE_THRESHOLD 3 74 #define PRINTF(...) printf(__VA_ARGS__) 80 #define RX_ACTIVE 0x80 81 #define RF_MUST_RESET 0x40 85 #define CRC_BIT_MASK 0x80 86 #define LQI_BIT_MASK 0x7F 88 #define RSSI_OFFSET 73 91 #define ONOFF_TIME RTIMER_ARCH_SECOND / 3125 93 #ifdef CC2538_RF_CONF_AUTOACK 94 #define CC2538_RF_AUTOACK CC2538_RF_CONF_AUTOACK 96 #define CC2538_RF_AUTOACK 1 102 #define RADIO_TO_RTIMER(X) ((uint32_t)((uint64_t)(X) * RTIMER_ARCH_SECOND / SYS_CTRL_32MHZ)) 104 #define CLOCK_STABLE() do { \ 105 while ( !(REG(SYS_CTRL_CLOCK_STA) & (SYS_CTRL_CLOCK_STA_XOSC_STB))); \ 109 static uint8_t
volatile poll_mode = 0;
111 static uint8_t send_on_cca = 1;
113 static uint8_t crc_corr;
115 static uint8_t rf_flags;
119 static int off(
void);
122 typedef struct output_config {
127 static const output_config_t output_power[] = {
144 #define OUTPUT_CONFIG_COUNT (sizeof(output_power) / sizeof(output_config_t)) 147 #define OUTPUT_POWER_MIN (output_power[OUTPUT_CONFIG_COUNT - 1].power) 148 #define OUTPUT_POWER_MAX (output_power[0].power) 150 PROCESS(cc2538_rf_process,
"cc2538 RF driver");
161 return (chan - CC2538_RF_CHANNEL_MIN) / CC2538_RF_CHANNEL_SPACING
162 + CC2538_RF_CHANNEL_MIN;
176 PRINTF(
"RF: Set Channel\n");
178 if((channel < CC2538_RF_CHANNEL_MIN) || (channel > CC2538_RF_CHANNEL_MAX)) {
179 return CC2538_RF_CHANNEL_SET_ERROR;
190 (channel - CC2538_RF_CHANNEL_MIN) * CC2538_RF_CHANNEL_SPACING;
197 rf_channel = channel;
199 return (int8_t)channel;
209 set_pan_id(uint16_t pan)
222 set_short_addr(uint16_t
addr)
262 get_cca_threshold(
void)
287 for(i = 0; i < OUTPUT_CONFIG_COUNT; i++) {
288 if(reg_val >= output_power[i].txpower_val) {
289 return output_power[i].power;
292 return OUTPUT_POWER_MIN;
306 for(i = OUTPUT_CONFIG_COUNT - 1; i >= 0; --i) {
307 if(power <= output_power[i].power) {
315 set_frame_filtering(uint8_t enable)
339 set_poll_mode(uint8_t enable)
355 set_send_on_cca(uint8_t enable)
357 send_on_cca = enable;
361 set_auto_ack(uint8_t enable)
371 get_sfd_timestamp(
void)
373 uint64_t sfd, timer_val, buffer;
383 timer_val |= (buffer << 32);
393 sfd |= (buffer << 32);
395 return RTIMER_NOW() - RADIO_TO_RTIMER(timer_val - sfd);
418 cca = CC2538_RF_CCA_CLEAR;
420 cca = CC2538_RF_CCA_BUSY;
436 if(!(rf_flags & RX_ACTIVE)) {
440 rf_flags |= RX_ACTIVE;
443 ENERGEST_ON(ENERGEST_TYPE_LISTEN);
464 rf_flags &= ~RX_ACTIVE;
466 ENERGEST_OFF(ENERGEST_TYPE_LISTEN);
473 PRINTF(
"RF: Init\n");
475 if(rf_flags & RF_ON) {
492 REG(ANA_REGS_IVCTRL) = 0x0B;
501 #if CC2538_RF_AUTOACK 542 set_poll_mode(poll_mode);
548 ENERGEST_ON(ENERGEST_TYPE_LISTEN);
554 prepare(
const void *payload,
unsigned short payload_len)
558 PRINTF(
"RF: Prepare 0x%02x bytes\n", payload_len + CHECKSUM_LEN);
566 if((rf_flags & RX_ACTIVE) == 0) {
572 PRINTF(
"RF: data = ");
577 PRINTF(
"<uDMA payload>");
581 (uint32_t)(payload) + payload_len - 1);
599 for(i = 0; i < payload_len; i++) {
601 PRINTF(
"%02x", ((
unsigned char *)(payload))[i]);
610 transmit(
unsigned short transmit_len)
613 int ret = RADIO_TX_ERR;
617 PRINTF(
"RF: Transmit\n");
619 if(!(rf_flags & RX_ACTIVE)) {
623 while(RTIMER_CLOCK_LT(
RTIMER_NOW(), t0 + ONOFF_TIME));
627 if(channel_clear() == CC2538_RF_CCA_BUSY) {
628 return RADIO_TX_COLLISION;
637 return RADIO_TX_COLLISION;
641 ENERGEST_SWITCH(ENERGEST_TYPE_LISTEN, ENERGEST_TYPE_TRANSMIT);
647 && (counter++ < 3)) {
652 PRINTF(
"RF: TX never active.\n");
660 ENERGEST_SWITCH(ENERGEST_TYPE_TRANSMIT, ENERGEST_TYPE_LISTEN);
670 send(
const void *payload,
unsigned short payload_len)
672 prepare(payload, payload_len);
673 return transmit(payload_len);
677 read(
void *buf,
unsigned short bufsize)
682 PRINTF(
"RF: Read\n");
692 if(len > CC2538_RF_MAX_PACKET_LEN) {
694 PRINTF(
"RF: bad sync\n");
700 if(len <= CC2538_RF_MIN_PACKET_LEN) {
701 PRINTF(
"RF: too short\n");
707 if(len - CHECKSUM_LEN > bufsize) {
708 PRINTF(
"RF: too long\n");
715 PRINTF(
"RF: read (0x%02x bytes) = ", len);
720 PRINTF(
"<uDMA payload>");
724 (uint32_t)(buf) + len - 1);
739 for(i = 0; i < len; ++i) {
741 PRINTF(
"%02x", ((
unsigned char *)(buf))[i]);
749 PRINTF(
"%02x%02x\n", (uint8_t)rssi, crc_corr);
752 if(crc_corr & CRC_BIT_MASK) {
753 packetbuf_set_attr(PACKETBUF_ATTR_RSSI, rssi);
754 packetbuf_set_attr(PACKETBUF_ATTR_LINK_QUALITY, crc_corr & LQI_BIT_MASK);
756 PRINTF(
"RF: Bad CRC\n");
776 receiving_packet(
void)
778 PRINTF(
"RF: Receiving\n");
794 PRINTF(
"RF: Pending\n");
799 static radio_result_t
803 return RADIO_RESULT_INVALID_VALUE;
807 case RADIO_PARAM_POWER_MODE:
809 ? RADIO_POWER_MODE_OFF : RADIO_POWER_MODE_ON;
810 return RADIO_RESULT_OK;
811 case RADIO_PARAM_CHANNEL:
813 return RADIO_RESULT_OK;
814 case RADIO_PARAM_PAN_ID:
815 *value = get_pan_id();
816 return RADIO_RESULT_OK;
817 case RADIO_PARAM_16BIT_ADDR:
818 *value = get_short_addr();
819 return RADIO_RESULT_OK;
820 case RADIO_PARAM_RX_MODE:
826 *value |= RADIO_RX_MODE_AUTOACK;
829 *value |= RADIO_RX_MODE_POLL_MODE;
831 return RADIO_RESULT_OK;
832 case RADIO_PARAM_TX_MODE:
837 return RADIO_RESULT_OK;
838 case RADIO_PARAM_TXPOWER:
839 *value = get_tx_power();
840 return RADIO_RESULT_OK;
841 case RADIO_PARAM_CCA_THRESHOLD:
842 *value = get_cca_threshold();
843 return RADIO_RESULT_OK;
844 case RADIO_PARAM_RSSI:
846 return RADIO_RESULT_OK;
847 case RADIO_PARAM_LAST_RSSI:
849 return RADIO_RESULT_OK;
850 case RADIO_PARAM_LAST_LINK_QUALITY:
851 *value = crc_corr & LQI_BIT_MASK;
852 return RADIO_RESULT_OK;
853 case RADIO_CONST_CHANNEL_MIN:
854 *value = CC2538_RF_CHANNEL_MIN;
855 return RADIO_RESULT_OK;
856 case RADIO_CONST_CHANNEL_MAX:
857 *value = CC2538_RF_CHANNEL_MAX;
858 return RADIO_RESULT_OK;
859 case RADIO_CONST_TXPOWER_MIN:
860 *value = OUTPUT_POWER_MIN;
861 return RADIO_RESULT_OK;
862 case RADIO_CONST_TXPOWER_MAX:
863 *value = OUTPUT_POWER_MAX;
864 return RADIO_RESULT_OK;
866 return RADIO_RESULT_NOT_SUPPORTED;
870 static radio_result_t
874 case RADIO_PARAM_POWER_MODE:
875 if(value == RADIO_POWER_MODE_ON) {
877 return RADIO_RESULT_OK;
879 if(value == RADIO_POWER_MODE_OFF) {
881 return RADIO_RESULT_OK;
883 return RADIO_RESULT_INVALID_VALUE;
884 case RADIO_PARAM_CHANNEL:
885 if(value < CC2538_RF_CHANNEL_MIN ||
886 value > CC2538_RF_CHANNEL_MAX) {
887 return RADIO_RESULT_INVALID_VALUE;
889 if(
set_channel(value) == CC2538_RF_CHANNEL_SET_ERROR) {
890 return RADIO_RESULT_ERROR;
892 return RADIO_RESULT_OK;
893 case RADIO_PARAM_PAN_ID:
894 set_pan_id(value & 0xffff);
895 return RADIO_RESULT_OK;
896 case RADIO_PARAM_16BIT_ADDR:
897 set_short_addr(value & 0xffff);
898 return RADIO_RESULT_OK;
899 case RADIO_PARAM_RX_MODE:
901 RADIO_RX_MODE_AUTOACK |
902 RADIO_RX_MODE_POLL_MODE)) {
903 return RADIO_RESULT_INVALID_VALUE;
907 set_auto_ack((value & RADIO_RX_MODE_AUTOACK) != 0);
908 set_poll_mode((value & RADIO_RX_MODE_POLL_MODE) != 0);
910 return RADIO_RESULT_OK;
911 case RADIO_PARAM_TX_MODE:
913 return RADIO_RESULT_INVALID_VALUE;
916 return RADIO_RESULT_OK;
917 case RADIO_PARAM_TXPOWER:
918 if(value < OUTPUT_POWER_MIN || value > OUTPUT_POWER_MAX) {
919 return RADIO_RESULT_INVALID_VALUE;
923 return RADIO_RESULT_OK;
924 case RADIO_PARAM_CCA_THRESHOLD:
925 set_cca_threshold(value);
926 return RADIO_RESULT_OK;
928 return RADIO_RESULT_NOT_SUPPORTED;
932 static radio_result_t
933 get_object(radio_param_t param,
void *dest,
size_t size)
938 if(param == RADIO_PARAM_64BIT_ADDR) {
939 if(size != 8 || !dest) {
940 return RADIO_RESULT_INVALID_VALUE;
944 for(i = 0; i < 8; i++) {
948 return RADIO_RESULT_OK;
951 if(param == RADIO_PARAM_LAST_PACKET_TIMESTAMP) {
952 if(size !=
sizeof(rtimer_clock_t) || !dest) {
953 return RADIO_RESULT_INVALID_VALUE;
955 *(rtimer_clock_t *)dest = get_sfd_timestamp();
956 return RADIO_RESULT_OK;
959 return RADIO_RESULT_NOT_SUPPORTED;
962 static radio_result_t
963 set_object(radio_param_t param,
const void *src,
size_t size)
967 if(param == RADIO_PARAM_64BIT_ADDR) {
968 if(size != 8 || !src) {
969 return RADIO_RESULT_INVALID_VALUE;
972 for(i = 0; i < 8; i++) {
976 return RADIO_RESULT_OK;
978 return RADIO_RESULT_NOT_SUPPORTED;
1015 PROCESS_YIELD_UNTIL((!poll_mode || (poll_mode && (rf_flags & RF_MUST_RESET))) && (ev == PROCESS_EVENT_POLL));
1024 NETSTACK_MAC.
input();
1029 if(rf_flags & RF_MUST_RESET) {
1092 rf_flags |= RF_MUST_RESET;
1103 set_frame_filtering(p);
#define RFCORE_XREG_RSSI_RSSI_VAL
RSSI estimate.
radio_result_t(* get_object)(radio_param_t param, void *dest, size_t size)
Get a radio parameter object.
#define RFCORE_FFSM_SHORT_ADDR0
Local address information.
void * packetbuf_dataptr(void)
Get a pointer to the data in the packetbuf.
Top-level header file for cc2538 RF Core registers.
int(* prepare)(const void *payload, unsigned short payload_len)
Prepare the radio with a packet to be sent.
#define RFCORE_SFR_MTM1_MTM1
Register[15:8].
#define RFCORE_XREG_SRCMATCH
Source address matching.
#define SYS_CTRL_RCGCRFC
RF Core clocks - active mode.
#define PROCESS(name, strname)
Declare a process.
#define RFCORE_SFR_MTCTRL_SYNC
Timer start/stop timing.
#define RFCORE_SFR_MTMOVF0
MAC Timer MUX overflow 0.
#define RFCORE_XREG_FRMCTRL0_AUTOACK
Transmit ACK frame enable.
Header file for the cc2538 System Control driver.
#define RFCORE_XREG_FSMSTAT0
Radio status register.
void udma_set_channel_dst(uint8_t channel, uint32_t dst_end)
Sets the channel's destination address.
void packetbuf_clear(void)
Clear and reset the packetbuf.
#define RFCORE_SFR_MTM1
MAC Timer MUX register 1.
#define SYS_CTRL_SCGCRFC
RF Core clocks - Sleep mode.
#define RFCORE_XREG_FSMSTAT1
Radio status register.
static uip_ds6_addr_t * addr
Pointer to a nbr cache entry.
#define RFCORE_SFR_MTCTRL_LATCH_MODE
OVF counter latch mode.
Header file for the cc2538 RF driver.
Header file for the energy estimation mechanism
#define CC2538_RF_CSP_ISFLUSHTX()
Flush the TX FIFO.
#define PROCESS_YIELD_UNTIL(c)
Yield the currently running process until a condition occurs.
Header file for the radio API
#define PROCESS_BEGIN()
Define the beginning of a process.
#define RFCORE_SFR_MTMOVF0_MTMOVF0
Register[7:0].
Header file for the link-layer address representation
#define PROCESS_END()
Define the end of a process.
int(* receiving_packet)(void)
Check if the radio driver is currently receiving a packet.
#define RFCORE_FFSM_SHORT_ADDR1
Local address information.
#define RFCORE_SFR_MTCTRL_RUN
Timer start/stop.
radio_result_t(* set_value)(radio_param_t param, radio_value_t value)
Set a radio parameter value.
int(* pending_packet)(void)
Check if the radio driver has just received a packet.
void clock_delay_usec(uint16_t dt)
Delay a given number of microseconds.
The structure of a device driver for a radio in Contiki.
#define RFCORE_XREG_FSMSTAT1_SFD
SFD was sent/received.
Header file with register manipulation macro definitions.
#define RFCORE_XREG_FRMFILT0_FRAME_FILTER_EN
Enables frame filtering.
#define RFCORE_XREG_CCACTRL0_CCA_THR
Clear-channel-assessment.
int(* channel_clear)(void)
Perform a Clear-Channel Assessment (CCA) to find out if there is a packet in the air or not...
int radio_value_t
Each radio has a set of parameters that designate the current configuration and state of the radio...
#define CC2538_RF_CONF_RX_DMA_CHAN
RAM -> RF DMA channel.
#define RFCORE_SFR_MTMSEL
MAC Timer multiplex select.
#define RFCORE_SFR_RFDATA
TX/RX FIFO data.
const struct radio_driver cc2538_rf_driver
The NETSTACK data structure for the cc2538 RF driver.
Header file with register, macro and function declarations for the cc2538 micro-DMA controller module...
#define CC2538_RF_CONF_TX_DMA_CHAN
RF -> RAM DMA channel.
#define RFCORE_XREG_FSMSTAT1_TX_ACTIVE
Status signal - TX states.
void udma_channel_mask_set(uint8_t channel)
Disable peripheral triggers for a uDMA channel.
#define RFCORE_XREG_RFERRM_RFERRM
RF error interrupt mask.
__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
Disable External Interrupt.
#define IEEE802154_DEFAULT_CHANNEL
The default channel for IEEE 802.15.4 networks.
#define RTIMER_NOW()
Get the current clock time.
#define RFCORE_XREG_FSMSTAT0_FSM_FFCTRL_STATE
FIFO and FFCTRL status.
#define RFCORE_FFSM_EXT_ADDR0
Local address information.
__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
Enable External Interrupt.
#define CC2538_RF_CSP_ISRXON()
Send an RX ON command strobe to the CSP.
void udma_set_channel_src(uint8_t channel, uint32_t src_end)
Sets the channels source address.
#define RFCORE_XREG_TXPOWER
Controls the output power.
void(* input)(void)
Callback for getting notified of incoming packet.
#define RFCORE_XREG_FSMSTAT1_FIFO
FIFO status.
#define CC2538_RF_CSP_ISRFOFF()
Send a RF OFF command strobe to the CSP.
#define RFCORE_XREG_RFIRQM0
RF interrupt masks.
int(* send)(const void *payload, unsigned short payload_len)
Prepare & transmit a packet.
int(* transmit)(unsigned short transmit_len)
Send the packet that has previously been prepared.
#define RFCORE_XREG_RSSISTAT
RSSI valid status register.
void process_poll(struct process *p)
Request a process to be polled.
int(* off)(void)
Turn the radio off.
#define RFCORE_FFSM_PAN_ID0
Local address information.
#define RFCORE_XREG_FRMCTRL0
Frame handling.
#define RFCORE_XREG_FSMSTAT1_FIFOP
FIFOP status.
#define RFCORE_XREG_RFIRQM0_FIFOP
RX FIFO exceeded threshold.
void cc2538_rf_err_isr(void)
The cc2538 RF Error ISR.
#define RFCORE_XREG_FREQCTRL
Controls the RF frequency.
void udma_channel_enable(uint8_t channel)
Enables a uDMA channel.
Header file for the real-time timer module.
#define RFCORE_SFR_MTM0
MAC Timer MUX register 0.
#define PACKETBUF_SIZE
The size of the packetbuf, in bytes.
#define RFCORE_XREG_FSMSTAT1_CCA
Clear channel assessment.
#define RFCORE_XREG_TXFILTCFG
TX filter configuration.
#define RFCORE_FFSM_PAN_ID1
Local address information.
#define RADIO_RX_MODE_ADDRESS_FILTER
The radio reception mode controls address filtering and automatic transmission of acknowledgements in...
#define RFCORE_SFR_MTMOVF2
MAC Timer MUX overflow 2.
void udma_channel_sw_request(uint8_t channel)
Generate a software trigger to start a transfer.
#define RFCORE_XREG_FIFOPCTRL
FIFOP threshold.
#define RADIO_TX_MODE_SEND_ON_CCA
The radio transmission mode controls whether transmissions should be done using clear channel assessm...
#define RFCORE_SFR_RFIRQF0_FIFOP
RX FIFO exceeded threshold.
static int8_t set_channel(uint8_t channel)
Set the current operating channel.
void cc2538_rf_rx_tx_isr(void)
The cc2538 RF RX/TX ISR.
#define RFCORE_SFR_MTMOVF1_MTMOVF1
Register[15:8].
#define RFCORE_XREG_RFERRM
RF error interrupt mask.
static radio_value_t get_rssi(void)
Reads the current signal strength (RSSI)
#define RFCORE_SFR_MTCTRL_STATE
State of MAC Timer.
#define CC2538_RF_CSP_ISTXON()
Send a TX ON command strobe to the CSP.
#define RFCORE_SFR_MTMOVF2_MTMOVF2
Register[23:16].
#define RFCORE_SFR_MTCTRL
MAC Timer control register.
int(* read)(void *buf, unsigned short buf_len)
Read a received packet into a buffer.
#define RFCORE_XREG_CCACTRL0
CCA threshold.
#define CC2538_RF_CSP_ISFLUSHRX()
Flush the RX FIFO.
#define RFCORE_XREG_RSSI
RSSI status register.
#define RFCORE_SFR_MTMOVF1
MAC Timer MUX overflow 1.
Header file for the Packet buffer (packetbuf) management
Include file for the Contiki low-layer network stack (NETSTACK)
radio_result_t(* get_value)(radio_param_t param, radio_value_t *value)
Get a radio parameter value.
#define RFCORE_XREG_FRMCTRL0_AUTOCRC
Auto CRC generation / checking.
#define RFCORE_XREG_AGCCTRL1
AGC reference level.
void udma_set_channel_control_word(uint8_t channel, uint32_t ctrl)
Configure the channel's control word.
#define RFCORE_XREG_RSSISTAT_RSSI_VALID
RSSI value is valid.
PROCESS_THREAD(cc2538_rf_process, ev, data)
Implementation of the cc2538 RF driver process.
#define udma_xfer_size(len)
Calculate the value of the xfersize field in the control structure.
#define RFCORE_XREG_RXENABLE_RXENMASK
Enables the receiver.
#define CC2538_RF_CONF_RX_USE_DMA
RF RX over DMA.
uint8_t udma_channel_get_mode(uint8_t channel)
Retrieve the current mode for a channel.
#define RFCORE_SFR_RFERRF
RF error interrupt flags.
#define RFCORE_SFR_MTMSEL_MTMOVFSEL
MTMOVF register select.
void cc2538_rf_set_promiscous_mode(char p)
Turn promiscous mode on or off.
radio_result_t(* set_object)(radio_param_t param, const void *src, size_t size)
Set a radio parameter object.
#define RFCORE_SFR_RFERRF_RXOVERF
RX FIFO overflowed.
#define RFCORE_SFR_MTMSEL_MTMSEL
MTM register select.
#define SYS_CTRL_DCGCRFC
RF Core clocks - PM0.
#define RFCORE_XREG_RXENABLE
RX enabling.
void packetbuf_set_datalen(uint16_t len)
Set the length of the data in the packetbuf.
int(* on)(void)
Turn the radio on.
#define CC2538_RF_CONF_TX_USE_DMA
RF TX over DMA.
#define RFCORE_SFR_MTM0_MTM0
Register[7:0].
#define RFCORE_SFR_RFIRQF0
RF interrupt flags.
#define RFCORE_XREG_FREQCTRL_FREQ
Frequency control word.
void process_start(struct process *p, process_data_t data)
Start a process.
static uint8_t get_channel()
Get the current operating channel.
#define RFCORE_XREG_FRMFILT0
Frame filtering control.