Contiki-NG
rf-core.c
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1 /*
2  * Copyright (c) 2015, Texas Instruments Incorporated - http://www.ti.com/
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  * notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  * notice, this list of conditions and the following disclaimer in the
12  * documentation and/or other materials provided with the distribution.
13  * 3. Neither the name of the copyright holder nor the names of its
14  * contributors may be used to endorse or promote products derived
15  * from this software without specific prior written permission.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
20  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
21  * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
22  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
23  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
26  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
28  * OF THE POSSIBILITY OF SUCH DAMAGE.
29  */
30 /*---------------------------------------------------------------------------*/
31 /**
32  * \addtogroup rf-core
33  * @{
34  *
35  * \file
36  * Implementation of the CC13xx/CC26xx RF core driver
37  */
38 /*---------------------------------------------------------------------------*/
39 #include "contiki.h"
40 #include "dev/watchdog.h"
41 #include "sys/process.h"
42 #include "sys/energest.h"
43 #include "sys/cc.h"
44 #include "net/netstack.h"
45 #include "net/packetbuf.h"
46 #include "rf-core/rf-core.h"
47 #include "rf-core/rf-switch.h"
48 #include "ti-lib.h"
49 /*---------------------------------------------------------------------------*/
50 /* RF core and RF HAL API */
51 #include "hw_rfc_dbell.h"
52 #include "hw_rfc_pwr.h"
53 /*---------------------------------------------------------------------------*/
54 /* RF Core Mailbox API */
55 #include "driverlib/rf_mailbox.h"
56 #include "driverlib/rf_common_cmd.h"
57 #include "driverlib/rf_data_entry.h"
58 /*---------------------------------------------------------------------------*/
59 #include <stdint.h>
60 #include <stdbool.h>
61 #include <stdio.h>
62 #include <string.h>
63 /*---------------------------------------------------------------------------*/
64 #define DEBUG 0
65 #if DEBUG
66 #define PRINTF(...) printf(__VA_ARGS__)
67 #else
68 #define PRINTF(...)
69 #endif
70 /*---------------------------------------------------------------------------*/
71 #ifdef RF_CORE_CONF_DEBUG_CRC
72 #define RF_CORE_DEBUG_CRC RF_CORE_CONF_DEBUG_CRC
73 #else
74 #define RF_CORE_DEBUG_CRC DEBUG
75 #endif
76 /*---------------------------------------------------------------------------*/
77 /* RF interrupts */
78 #define RX_FRAME_IRQ IRQ_RX_ENTRY_DONE
79 #define ERROR_IRQ (IRQ_INTERNAL_ERROR | IRQ_RX_BUF_FULL)
80 #define RX_NOK_IRQ IRQ_RX_NOK
81 
82 /* Those IRQs are enabled all the time */
83 #if RF_CORE_DEBUG_CRC
84 #define ENABLED_IRQS (RX_FRAME_IRQ | ERROR_IRQ | RX_NOK_IRQ)
85 #else
86 #define ENABLED_IRQS (RX_FRAME_IRQ | ERROR_IRQ)
87 #endif
88 
89 #define ENABLED_IRQS_POLL_MODE (ENABLED_IRQS & ~(RX_FRAME_IRQ | ERROR_IRQ))
90 
91 #define cc26xx_rf_cpe0_isr RFCCPE0IntHandler
92 #define cc26xx_rf_cpe1_isr RFCCPE1IntHandler
93 /*---------------------------------------------------------------------------*/
94 typedef ChipType_t chip_type_t;
95 /*---------------------------------------------------------------------------*/
96 /* Remember the last Radio Op issued to the radio */
97 static rfc_radioOp_t *last_radio_op = NULL;
98 /*---------------------------------------------------------------------------*/
99 /* A struct holding pointers to the primary mode's abort() and restore() */
100 static const rf_core_primary_mode_t *primary_mode = NULL;
101 /*---------------------------------------------------------------------------*/
102 /* Radio timer (RAT) offset as compared to the rtimer counter (RTC) */
103 int32_t rat_offset = 0;
104 static bool rat_offset_known = false;
105 /*---------------------------------------------------------------------------*/
106 /* Buffer full flag */
107 volatile bool rx_is_full = false;
108 /*---------------------------------------------------------------------------*/
109 PROCESS(rf_core_process, "CC13xx / CC26xx RF driver");
110 /*---------------------------------------------------------------------------*/
111 #define RF_CORE_CLOCKS_MASK (RFC_PWR_PWMCLKEN_RFC_M | RFC_PWR_PWMCLKEN_CPE_M \
112  | RFC_PWR_PWMCLKEN_CPERAM_M | RFC_PWR_PWMCLKEN_FSCA_M \
113  | RFC_PWR_PWMCLKEN_PHA_M | RFC_PWR_PWMCLKEN_RAT_M \
114  | RFC_PWR_PWMCLKEN_RFERAM_M | RFC_PWR_PWMCLKEN_RFE_M \
115  | RFC_PWR_PWMCLKEN_MDMRAM_M | RFC_PWR_PWMCLKEN_MDM_M)
116 /*---------------------------------------------------------------------------*/
117 #define RF_CMD0 0x0607
118 /*---------------------------------------------------------------------------*/
119 uint8_t
121 {
122  if(ti_lib_prcm_rf_ready()) {
123  return RF_CORE_ACCESSIBLE;
124  }
125  return RF_CORE_NOT_ACCESSIBLE;
126 }
127 /*---------------------------------------------------------------------------*/
128 uint_fast8_t
129 rf_core_send_cmd(uint32_t cmd, uint32_t *status)
130 {
131  uint32_t timeout_count = 0;
132  bool interrupts_disabled;
133  bool is_radio_op = false;
134 
135  /*
136  * If cmd is 4-byte aligned, then it's either a radio OP or an immediate
137  * command. Clear the status field if it's a radio OP
138  */
139  if((cmd & 0x03) == 0) {
140  uint32_t cmd_type;
141  cmd_type = ((rfc_command_t *)cmd)->commandNo & RF_CORE_COMMAND_TYPE_MASK;
142  if(cmd_type == RF_CORE_COMMAND_TYPE_IEEE_FG_RADIO_OP ||
143  cmd_type == RF_CORE_COMMAND_TYPE_RADIO_OP) {
144  is_radio_op = true;
145  ((rfc_radioOp_t *)cmd)->status = RF_CORE_RADIO_OP_STATUS_IDLE;
146  }
147  }
148 
149  /*
150  * Make sure ContikiMAC doesn't turn us off from within an interrupt while
151  * we are accessing RF Core registers
152  */
153  interrupts_disabled = ti_lib_int_master_disable();
154 
155  if(!rf_core_is_accessible()) {
156  PRINTF("rf_core_send_cmd: RF was off\n");
157  if(!interrupts_disabled) {
158  ti_lib_int_master_enable();
159  }
160  return RF_CORE_CMD_ERROR;
161  }
162 
163  if(is_radio_op) {
164  uint16_t command_no = ((rfc_radioOp_t *)cmd)->commandNo;
165  if((command_no & RF_CORE_COMMAND_PROTOCOL_MASK) != RF_CORE_COMMAND_PROTOCOL_COMMON &&
166  (command_no & RF_CORE_COMMAND_TYPE_MASK) == RF_CORE_COMMAND_TYPE_RADIO_OP) {
167  last_radio_op = (rfc_radioOp_t *)cmd;
168  }
169  }
170 
171  HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDR) = cmd;
172  do {
173  *status = HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDSTA);
174  if(++timeout_count > 50000) {
175  PRINTF("rf_core_send_cmd: 0x%08lx Timeout\n", cmd);
176  if(!interrupts_disabled) {
177  ti_lib_int_master_enable();
178  }
179  return RF_CORE_CMD_ERROR;
180  }
181  } while((*status & RF_CORE_CMDSTA_RESULT_MASK) == RF_CORE_CMDSTA_PENDING);
182 
183  if(!interrupts_disabled) {
184  ti_lib_int_master_enable();
185  }
186 
187  /*
188  * If we reach here the command is no longer pending. It is either completed
189  * successfully or with error
190  */
191  return (*status & RF_CORE_CMDSTA_RESULT_MASK) == RF_CORE_CMDSTA_DONE;
192 }
193 /*---------------------------------------------------------------------------*/
194 uint_fast8_t
196 {
197  volatile rfc_radioOp_t *command = (rfc_radioOp_t *)cmd;
198  uint32_t timeout_cnt = 0;
199 
200  /*
201  * 0xn4nn=DONE, 0x0400=DONE_OK while all other "DONE" values means done
202  * but with some kind of error (ref. "Common radio operation status codes")
203  */
204  do {
205  if(++timeout_cnt > 500000) {
206  return RF_CORE_CMD_ERROR;
207  }
208  } while((command->status & RF_CORE_RADIO_OP_MASKED_STATUS)
209  != RF_CORE_RADIO_OP_MASKED_STATUS_DONE);
210 
211  return (command->status & RF_CORE_RADIO_OP_MASKED_STATUS)
212  == RF_CORE_RADIO_OP_STATUS_DONE_OK;
213 }
214 /*---------------------------------------------------------------------------*/
215 static int
216 fs_powerdown(void)
217 {
218  rfc_CMD_FS_POWERDOWN_t cmd;
219  uint32_t cmd_status;
220 
221  rf_core_init_radio_op((rfc_radioOp_t *)&cmd, sizeof(cmd), CMD_FS_POWERDOWN);
222 
223  if(rf_core_send_cmd((uint32_t)&cmd, &cmd_status) != RF_CORE_CMD_OK) {
224  PRINTF("fs_powerdown: CMDSTA=0x%08lx\n", cmd_status);
225  return RF_CORE_CMD_ERROR;
226  }
227 
228  if(rf_core_wait_cmd_done(&cmd) != RF_CORE_CMD_OK) {
229  PRINTF("fs_powerdown: CMDSTA=0x%08lx, status=0x%04x\n",
230  cmd_status, cmd.status);
231  return RF_CORE_CMD_ERROR;
232  }
233 
234  return RF_CORE_CMD_OK;
235 }
236 /*---------------------------------------------------------------------------*/
237 int
239 {
240  uint32_t cmd_status;
241  bool interrupts_disabled = ti_lib_int_master_disable();
242 
243  ti_lib_int_pend_clear(INT_RFC_CPE_0);
244  ti_lib_int_pend_clear(INT_RFC_CPE_1);
245  ti_lib_int_disable(INT_RFC_CPE_0);
246  ti_lib_int_disable(INT_RFC_CPE_1);
247 
248  /* Enable RF Core power domain */
249  ti_lib_prcm_power_domain_on(PRCM_DOMAIN_RFCORE);
250  while(ti_lib_prcm_power_domain_status(PRCM_DOMAIN_RFCORE)
251  != PRCM_DOMAIN_POWER_ON);
252 
253  ti_lib_prcm_domain_enable(PRCM_DOMAIN_RFCORE);
254  ti_lib_prcm_load_set();
255  while(!ti_lib_prcm_load_get());
256 
257  HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = 0x0;
258  HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIEN) = 0x0;
259  ti_lib_int_enable(INT_RFC_CPE_0);
260  ti_lib_int_enable(INT_RFC_CPE_1);
261 
262  if(!interrupts_disabled) {
263  ti_lib_int_master_enable();
264  }
265 
266  rf_switch_power_up();
267 
268  /* Let CPE boot */
269  HWREG(RFC_PWR_NONBUF_BASE + RFC_PWR_O_PWMCLKEN) = RF_CORE_CLOCKS_MASK;
270 
271  /* Turn on additional clocks on boot */
272  HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFACKIFG) = 0;
273  HWREG(RFC_DBELL_BASE+RFC_DBELL_O_CMDR) =
274  CMDR_DIR_CMD_2BYTE(RF_CMD0,
275  RFC_PWR_PWMCLKEN_MDMRAM | RFC_PWR_PWMCLKEN_RFERAM);
276 
277  /* Send ping (to verify RFCore is ready and alive) */
278  if(rf_core_send_cmd(CMDR_DIR_CMD(CMD_PING), &cmd_status) != RF_CORE_CMD_OK) {
279  PRINTF("rf_core_power_up: CMD_PING fail, CMDSTA=0x%08lx\n", cmd_status);
280  return RF_CORE_CMD_ERROR;
281  }
282 
283  return RF_CORE_CMD_OK;
284 }
285 /*---------------------------------------------------------------------------*/
286 uint8_t
288 {
289  uint32_t cmd_status;
290  rfc_CMD_SYNC_START_RAT_t cmd_start;
291 
292  /* Start radio timer (RAT) */
293  rf_core_init_radio_op((rfc_radioOp_t *)&cmd_start, sizeof(cmd_start), CMD_SYNC_START_RAT);
294 
295  /* copy the value and send back */
296  cmd_start.rat0 = rat_offset;
297 
298  if(rf_core_send_cmd((uint32_t)&cmd_start, &cmd_status) != RF_CORE_CMD_OK) {
299  PRINTF("rf_core_get_rat_rtc_offset: SYNC_START_RAT fail, CMDSTA=0x%08lx\n",
300  cmd_status);
301  return RF_CORE_CMD_ERROR;
302  }
303 
304  /* Wait until done (?) */
305  if(rf_core_wait_cmd_done(&cmd_start) != RF_CORE_CMD_OK) {
306  PRINTF("rf_core_cmd_ok: SYNC_START_RAT wait, CMDSTA=0x%08lx, status=0x%04x\n",
307  cmd_status, cmd_start.status);
308  return RF_CORE_CMD_ERROR;
309  }
310 
311  return RF_CORE_CMD_OK;
312 }
313 /*---------------------------------------------------------------------------*/
314 uint8_t
316 {
317  rfc_CMD_SYNC_STOP_RAT_t cmd_stop;
318  uint32_t cmd_status;
319 
320  rf_core_init_radio_op((rfc_radioOp_t *)&cmd_stop, sizeof(cmd_stop), CMD_SYNC_STOP_RAT);
321 
322  int ret = rf_core_send_cmd((uint32_t)&cmd_stop, &cmd_status);
323  if(ret != RF_CORE_CMD_OK) {
324  PRINTF("rf_core_get_rat_rtc_offset: SYNC_STOP_RAT fail, ret %d CMDSTA=0x%08lx\n",
325  ret, cmd_status);
326  return ret;
327  }
328 
329  /* Wait until done */
330  ret = rf_core_wait_cmd_done(&cmd_stop);
331  if(ret != RF_CORE_CMD_OK) {
332  PRINTF("rf_core_cmd_ok: SYNC_STOP_RAT wait, CMDSTA=0x%08lx, status=0x%04x\n",
333  cmd_status, cmd_stop.status);
334  return ret;
335  }
336 
337  if(!rat_offset_known) {
338  /* save the offset, but only if this is the first time */
339  rat_offset_known = true;
340  rat_offset = cmd_stop.rat0;
341  }
342 
343  return RF_CORE_CMD_OK;
344 }
345 /*---------------------------------------------------------------------------*/
346 void
348 {
349  bool interrupts_disabled = ti_lib_int_master_disable();
350  ti_lib_int_disable(INT_RFC_CPE_0);
351  ti_lib_int_disable(INT_RFC_CPE_1);
352 
353  if(rf_core_is_accessible()) {
354  HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = 0x0;
355  HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIEN) = 0x0;
356 
357  /* need to send FS_POWERDOWN or analog components will use power */
358  fs_powerdown();
359  }
360 
362 
363  /* Shut down the RFCORE clock domain in the MCU VD */
364  ti_lib_prcm_domain_disable(PRCM_DOMAIN_RFCORE);
365  ti_lib_prcm_load_set();
366  while(!ti_lib_prcm_load_get());
367 
368  /* Turn off RFCORE PD */
369  ti_lib_prcm_power_domain_off(PRCM_DOMAIN_RFCORE);
370  while(ti_lib_prcm_power_domain_status(PRCM_DOMAIN_RFCORE)
371  != PRCM_DOMAIN_POWER_OFF);
372 
373  rf_switch_power_down();
374 
375  ti_lib_int_pend_clear(INT_RFC_CPE_0);
376  ti_lib_int_pend_clear(INT_RFC_CPE_1);
377  ti_lib_int_enable(INT_RFC_CPE_0);
378  ti_lib_int_enable(INT_RFC_CPE_1);
379  if(!interrupts_disabled) {
380  ti_lib_int_master_enable();
381  }
382 }
383 /*---------------------------------------------------------------------------*/
384 uint8_t
386 {
387  uint8_t rv = RF_CORE_CMD_ERROR;
388  chip_type_t chip_type = ti_lib_chipinfo_get_chip_type();
389 
390  if(chip_type == CHIP_TYPE_CC2650) {
391  HWREG(PRCM_BASE + PRCM_O_RFCMODESEL) = PRCM_RFCMODESEL_CURR_MODE5;
392  rv = RF_CORE_CMD_OK;
393  } else if(chip_type == CHIP_TYPE_CC2630) {
394  HWREG(PRCM_BASE + PRCM_O_RFCMODESEL) = PRCM_RFCMODESEL_CURR_MODE2;
395  rv = RF_CORE_CMD_OK;
396  } else if(chip_type == CHIP_TYPE_CC1310) {
397  HWREG(PRCM_BASE + PRCM_O_RFCMODESEL) = PRCM_RFCMODESEL_CURR_MODE3;
398  rv = RF_CORE_CMD_OK;
399  } else if(chip_type == CHIP_TYPE_CC1350) {
400  HWREG(PRCM_BASE + PRCM_O_RFCMODESEL) = PRCM_RFCMODESEL_CURR_MODE5;
401  rv = RF_CORE_CMD_OK;
402  }
403 
404  return rv;
405 }
406 /*---------------------------------------------------------------------------*/
407 uint8_t
409 {
410  if(rf_core_power_up() != RF_CORE_CMD_OK) {
411  PRINTF("rf_core_boot: rf_core_power_up() failed\n");
412 
414 
415  return RF_CORE_CMD_ERROR;
416  }
417 
418  if(rf_core_start_rat() != RF_CORE_CMD_OK) {
419  PRINTF("rf_core_boot: rf_core_start_rat() failed\n");
420 
422 
423  return RF_CORE_CMD_ERROR;
424  }
425 
426  return RF_CORE_CMD_OK;
427 }
428 /*---------------------------------------------------------------------------*/
429 uint8_t
431 {
432  if(rf_core_stop_rat() != RF_CORE_CMD_OK) {
433  PRINTF("rf_core_restart_rat: rf_core_stop_rat() failed\n");
434  /* Don't bail out here, still try to start it */
435  }
436 
437  if(rf_core_start_rat() != RF_CORE_CMD_OK) {
438  PRINTF("rf_core_restart_rat: rf_core_start_rat() failed\n");
439 
441 
442  return RF_CORE_CMD_ERROR;
443  }
444 
445  return RF_CORE_CMD_OK;
446 }
447 /*---------------------------------------------------------------------------*/
448 void
450 {
451  bool interrupts_disabled;
452  const uint32_t enabled_irqs = poll_mode ? ENABLED_IRQS_POLL_MODE : ENABLED_IRQS;
453 
454  /* We are already turned on by the caller, so this should not happen */
455  if(!rf_core_is_accessible()) {
456  PRINTF("setup_interrupts: No access\n");
457  return;
458  }
459 
460  /* Disable interrupts */
461  interrupts_disabled = ti_lib_int_master_disable();
462 
463  /* Set all interrupt channels to CPE0 channel, error to CPE1 */
464  HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEISL) = ERROR_IRQ;
465 
466  /* Acknowledge configured interrupts */
467  HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIEN) = enabled_irqs;
468 
469  /* Clear interrupt flags, active low clear(?) */
470  HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = 0x0;
471 
472  ti_lib_int_pend_clear(INT_RFC_CPE_0);
473  ti_lib_int_pend_clear(INT_RFC_CPE_1);
474  ti_lib_int_enable(INT_RFC_CPE_0);
475  ti_lib_int_enable(INT_RFC_CPE_1);
476 
477  if(!interrupts_disabled) {
478  ti_lib_int_master_enable();
479  }
480 }
481 /*---------------------------------------------------------------------------*/
482 void
483 rf_core_cmd_done_en(bool fg, bool poll_mode)
484 {
485  uint32_t irq = fg ? IRQ_LAST_FG_COMMAND_DONE : IRQ_LAST_COMMAND_DONE;
486  const uint32_t enabled_irqs = poll_mode ? ENABLED_IRQS_POLL_MODE : ENABLED_IRQS;
487 
488  HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = enabled_irqs;
489  HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIEN) = enabled_irqs | irq;
490 }
491 /*---------------------------------------------------------------------------*/
492 void
493 rf_core_cmd_done_dis(bool poll_mode)
494 {
495  const uint32_t enabled_irqs = poll_mode ? ENABLED_IRQS_POLL_MODE : ENABLED_IRQS;
496  HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIEN) = enabled_irqs;
497 }
498 /*---------------------------------------------------------------------------*/
499 rfc_radioOp_t *
501 {
502  return last_radio_op;
503 }
504 /*---------------------------------------------------------------------------*/
505 void
506 rf_core_init_radio_op(rfc_radioOp_t *op, uint16_t len, uint16_t command)
507 {
508  memset(op, 0, len);
509 
510  op->commandNo = command;
511  op->condition.rule = COND_NEVER;
512 }
513 /*---------------------------------------------------------------------------*/
514 void
516 {
517  primary_mode = mode;
518 }
519 /*---------------------------------------------------------------------------*/
520 void
522 {
523  if(primary_mode) {
524  if(primary_mode->abort) {
525  primary_mode->abort();
526  }
527  }
528 }
529 /*---------------------------------------------------------------------------*/
530 uint8_t
532 {
533  if(primary_mode) {
534  if(primary_mode->restore) {
535  return primary_mode->restore();
536  }
537  }
538 
539  return RF_CORE_CMD_ERROR;
540 }
541 /*---------------------------------------------------------------------------*/
542 PROCESS_THREAD(rf_core_process, ev, data)
543 {
544  int len;
545 
546  PROCESS_BEGIN();
547 
548  while(1) {
549  PROCESS_YIELD_UNTIL(ev == PROCESS_EVENT_POLL);
550  do {
552  packetbuf_clear();
553  len = NETSTACK_RADIO.read(packetbuf_dataptr(), PACKETBUF_SIZE);
554 
555  if(len > 0) {
557 
558  NETSTACK_MAC.input();
559  }
560  } while(len > 0);
561  }
562  PROCESS_END();
563 }
564 /*---------------------------------------------------------------------------*/
565 static void
566 rx_nok_isr(void)
567 {
568 }
569 /*---------------------------------------------------------------------------*/
570 void
571 cc26xx_rf_cpe1_isr(void)
572 {
573  PRINTF("RF Error\n");
574 
575  if(!rf_core_is_accessible()) {
576  if(rf_core_power_up() != RF_CORE_CMD_OK) {
577  return;
578  }
579  }
580 
581  if(HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) & IRQ_RX_BUF_FULL) {
582  PRINTF("\nRF: BUF_FULL\n\n");
583  /* set a flag that the buffer is full*/
584  rx_is_full = true;
585  /* make sure read_frame() will be called to make space in RX buffer */
586  process_poll(&rf_core_process);
587  /* Clear the IRQ_RX_BUF_FULL interrupt flag by writing zero to bit */
588  HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = ~(IRQ_RX_BUF_FULL);
589  }
590 
591  /* Clear INTERNAL_ERROR interrupt flag */
592  HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = 0x7FFFFFFF;
593 }
594 /*---------------------------------------------------------------------------*/
595 void
596 cc26xx_rf_cpe0_isr(void)
597 {
598  if(!rf_core_is_accessible()) {
599  printf("RF ISR called but RF not ready... PANIC!!\n");
600  if(rf_core_power_up() != RF_CORE_CMD_OK) {
601  PRINTF("rf_core_power_up() failed\n");
602  return;
603  }
604  }
605 
606  ti_lib_int_master_disable();
607 
608  if(HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) & RX_FRAME_IRQ) {
609  /* Clear the RX_ENTRY_DONE interrupt flag */
610  HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = 0xFF7FFFFF;
611  process_poll(&rf_core_process);
612  }
613 
614  if(RF_CORE_DEBUG_CRC) {
615  if(HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) & RX_NOK_IRQ) {
616  /* Clear the RX_NOK interrupt flag */
617  HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = 0xFFFDFFFF;
618  rx_nok_isr();
619  }
620  }
621 
622  if(HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) &
623  (IRQ_LAST_FG_COMMAND_DONE | IRQ_LAST_COMMAND_DONE)) {
624  /* Clear the two TX-related interrupt flags */
625  HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = 0xFFFFFFF5;
626  }
627 
628  ti_lib_int_master_enable();
629 }
630 /*---------------------------------------------------------------------------*/
631 /** @} */
void * packetbuf_dataptr(void)
Get a pointer to the data in the packetbuf.
Definition: packetbuf.c:143
#define PROCESS(name, strname)
Declare a process.
Definition: process.h:307
void rf_core_setup_interrupts(bool poll_mode)
Setup RF core interrupts.
Definition: rf-core.c:449
Header file with macros which rename TI CC26xxware functions.
void packetbuf_clear(void)
Clear and reset the packetbuf.
Definition: packetbuf.c:75
Header file for the energy estimation mechanism
#define PROCESS_YIELD_UNTIL(c)
Yield the currently running process until a condition occurs.
Definition: process.h:178
rfc_radioOp_t * rf_core_get_last_radio_op()
Returns a pointer to the most recent proto-dependent Radio Op.
Definition: rf-core.c:500
#define PROCESS_BEGIN()
Define the beginning of a process.
Definition: process.h:120
#define PROCESS_END()
Define the end of a process.
Definition: process.h:131
int rf_core_power_up()
Turn on power to the RFC and boot it.
Definition: rf-core.c:238
void rf_core_power_down()
Disable RFCORE clock domain in the MCU VD and turn off the RFCORE PD.
Definition: rf-core.c:347
uint8_t rf_core_set_modesel()
Initialise RF APIs in the RF core.
Definition: rf-core.c:385
Header file for the CC13xx/CC26xx RF core driver.
void rf_core_primary_mode_abort()
Abort the currently running primary radio op.
Definition: rf-core.c:521
void(* input)(void)
Callback for getting notified of incoming packet.
Definition: mac.h:72
void rf_core_primary_mode_register(const rf_core_primary_mode_t *mode)
Register a primary mode for radio operation.
Definition: rf-core.c:515
void rf_core_cmd_done_dis(bool poll_mode)
Disable the LAST_CMD_DONE and LAST_FG_CMD_DONE interrupts.
Definition: rf-core.c:493
A data strcuture representing the radio&#39;s primary mode of operation.
Definition: rf-core.h:125
void process_poll(struct process *p)
Request a process to be polled.
Definition: process.c:371
#define PACKETBUF_SIZE
The size of the packetbuf, in bytes.
Definition: packetbuf.h:66
Header file for the Contiki process interface.
uint8_t(* restore)(void)
A pointer to a function that will restore the previous radio op.
Definition: rf-core.h:135
void rf_core_init_radio_op(rfc_radioOp_t *op, uint16_t len, uint16_t command)
Prepare a buffer to host a Radio Op.
Definition: rf-core.c:506
uint8_t rf_core_primary_mode_restore()
Abort the currently running primary radio op.
Definition: rf-core.c:531
Header file with definitions related to RF switch support.
uint8_t rf_core_is_accessible()
Check whether the RF core is accessible.
Definition: rf-core.c:120
void(* abort)(void)
A pointer to a function used to abort the current radio op.
Definition: rf-core.h:129
uint_fast8_t rf_core_send_cmd(uint32_t cmd, uint32_t *status)
Sends a command to the RF core.
Definition: rf-core.c:129
void rf_core_cmd_done_en(bool fg, bool poll_mode)
Enable interrupt on command done.
Definition: rf-core.c:483
Header file for the Packet buffer (packetbuf) management
Include file for the Contiki low-layer network stack (NETSTACK)
uint8_t rf_core_start_rat(void)
Start the CM0 RAT.
Definition: rf-core.c:287
void watchdog_periodic(void)
Writes the WDT clear sequence.
Definition: watchdog.c:85
uint8_t rf_core_restart_rat(void)
Restart the CM0 RAT.
Definition: rf-core.c:430
Default definitions of C compiler quirk work-arounds.
PROCESS_THREAD(cc2538_rf_process, ev, data)
Implementation of the cc2538 RF driver process.
Definition: cc2538-rf.c:1008
uint8_t rf_core_boot()
Boot the RF Core.
Definition: rf-core.c:408
void packetbuf_set_datalen(uint16_t len)
Set the length of the data in the packetbuf.
Definition: packetbuf.c:136
uint8_t rf_core_stop_rat(void)
Stop the CM0 RAT synchronously.
Definition: rf-core.c:315
uint_fast8_t rf_core_wait_cmd_done(void *cmd)
Block and wait for a Radio op to complete.
Definition: rf-core.c:195